A pointer to it was set up in the MIPS and RISCV system classes, but nothing ever set that pointer. The class was put in base/loader, but didn't have anything to do (as far as I can see) with loading anything it had a loadSegments method, but was not a subclass of ObjectFile. Change-Id: I4b711a31df20e20ffc306709227f60aa020fca15 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21464 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
80 lines
2.4 KiB
C++
80 lines
2.4 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* Copyright (c) 2007 MIPS Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Nathan Binkert
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* Jaidev Patwardhan
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* Robert Scheffel
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*/
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#include "arch/riscv/system.hh"
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#include "arch/vtophys.hh"
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#include "base/loader/object_file.hh"
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#include "base/loader/symtab.hh"
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#include "base/trace.hh"
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#include "mem/physical.hh"
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#include "params/RiscvSystem.hh"
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#include "sim/byteswap.hh"
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using namespace LittleEndianGuest;
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RiscvSystem::RiscvSystem(Params *p)
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: System(p),
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_isBareMetal(p->bare_metal),
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_resetVect(p->reset_vect)
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{
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}
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RiscvSystem::~RiscvSystem()
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{
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}
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Addr
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RiscvSystem::fixFuncEventAddr(Addr addr)
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{
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return addr;
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}
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void
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RiscvSystem::setRiscvAccess(Addr access)
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{}
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bool
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RiscvSystem::breakpoint()
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{
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return 0;
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}
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RiscvSystem *
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RiscvSystemParams::create()
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{
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return new RiscvSystem(this);
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}
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