Andreas Sandberg 53e777d683 base: Declare a type for context IDs ...

Context IDs used to be declared as ad hoc (usually as int). This
changeset introduces a typedef for ContextIDs and a constant for
invalid context IDs.

2015-08-07 09:59:13 +01:00

..

probe

base: add support for probe points and common probes

2014-01-24 15:29:30 -06:00

base_dyn_inst.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

checker.cc

sim: Add the notion of clock domains to all ClockedObjects

2013-06-27 05:49:49 -04:00

checker.hh

cpu: Add header files for checker CPUs

2012-11-02 11:32:01 -05:00

comm.hh

mem, cpu: Add a separate flag for strictly ordered memory

2015-05-05 03:22:33 -04:00

commit_impl.hh

mem, cpu: Add a separate flag for strictly ordered memory

2015-05-05 03:22:33 -04:00

commit.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

commit.hh

cpu: o3: commit: mark pipeline delay variable as consts

2015-03-09 09:39:08 -05:00

cpu_policy.hh

cpu/o3: clean up rename map and free list

2013-10-15 14:22:44 -04:00

cpu.cc

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

cpu.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

decode_impl.hh

cpu: Fix o3 front-end pipeline interlock behavior

2014-09-03 07:42:34 -04:00

decode.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

decode.hh

cpu: Fix o3 front-end pipeline interlock behavior

2014-09-03 07:42:34 -04:00

dep_graph.hh

cpu: Rewrite O3 draining to avoid stopping in microcode

2013-01-07 13:05:46 -05:00

deriv.cc

branch predictor: move out of o3 and inorder cpus

2013-01-24 12:28:51 -06:00

deriv.hh

cpu: O3 add a header declaring the DerivO3CPU

2012-11-02 11:32:01 -05:00

dyn_inst_impl.hh

arch: Use shared_ptr for all Faults

2014-10-16 05:49:51 -04:00

dyn_inst.cc

O3: Generaize the O3 IMPL class so it isn't split out by ISA.

2008-10-09 00:10:02 -07:00

dyn_inst.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

fetch_impl.hh

cpu: Fixed a bug on where to fetch the next instruction from

2015-07-20 09:15:18 -05:00

fetch.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

fetch.hh

mem: Split port retry for all different packet classes

2015-03-02 04:00:35 -05:00

free_list.cc

cpu: add a condition-code register class

2013-10-15 14:22:44 -04:00

free_list.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

fu_pool.cc

cpu: Work around gcc 4.9 issues with Num_OpClasses

2015-05-05 03:22:19 -04:00

fu_pool.hh

cpu: Work around gcc 4.9 issues with Num_OpClasses

2015-05-05 03:22:19 -04:00

FuncUnitConfig.py

cpu: o3: replace issueLatency with bool pipelined

2015-04-29 22:35:22 -05:00

FUPool.py

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

iew_impl.hh

mem, cpu: Add a separate flag for strictly ordered memory

2015-05-05 03:22:33 -04:00

iew.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

iew.hh

cpu: Fix cache blocked load behavior in o3 cpu

2014-09-03 07:42:39 -04:00

impl.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

inst_queue_impl.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

inst_queue.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

inst_queue.hh

cpu: Add writeback modeling for drain functionality

2014-10-29 23:18:27 -05:00

isa_specific.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

lsq_impl.hh

mem: Split port retry for all different packet classes

2015-03-02 04:00:35 -05:00

lsq_unit_impl.hh

mem, cpu: Add a separate flag for strictly ordered memory

2015-05-05 03:22:33 -04:00

lsq_unit.cc

…

lsq_unit.hh

mem, cpu: Add a separate flag for strictly ordered memory

2015-05-05 03:22:33 -04:00

lsq.cc

…

lsq.hh

mem: Split port retry for all different packet classes

2015-03-02 04:00:35 -05:00

mem_dep_unit_impl.hh

cpu: Add drain check functionality to IEW

2014-10-29 23:18:26 -05:00

mem_dep_unit.cc

clang: Enable compiling gem5 using clang 2.9 and 3.0

2012-01-31 12:05:52 -05:00

mem_dep_unit.hh

cpu: Add drain check functionality to IEW

2014-10-29 23:18:26 -05:00

O3Checker.py

cpu: Make checker CPUs inherit from CheckerCPU in the Python hierarchy

2013-02-15 17:40:08 -05:00

O3CPU.py

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

regfile.cc

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

regfile.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

rename_impl.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

rename_map.cc

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

rename_map.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

rename.cc

…

rename.hh

cpu: Use a deque in o3 rename instruction queue

2014-09-19 10:35:14 -04:00

rob_impl.hh

style: eliminate equality tests with true and false

2014-05-31 18:00:23 -07:00

rob.cc

…

rob.hh

cpu: Construct ROB with cpu params struct instead of each variable

2013-10-31 13:41:13 -05:00

SConscript

cpu: Remove Ozone CPU from the source tree

2014-10-09 17:51:58 -04:00

SConsopts

arch, cpu: Factor out the ExecContext into a proper base class

2014-09-03 07:42:22 -04:00

scoreboard.cc

cpu/o3: clean up scoreboard object

2013-10-15 14:22:43 -04:00

scoreboard.hh

scons: Fixes uninitialized warnings issued by clang

2014-03-07 15:56:23 -05:00

store_set.cc

LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper.

2011-08-19 15:08:07 -05:00

store_set.hh

LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper.

2011-08-19 15:08:07 -05:00

thread_context_impl.hh

revert 5af8f40d8f2c

2015-07-28 01:58:04 -05:00

thread_context.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

thread_context.hh

base: Declare a type for context IDs

2015-08-07 09:59:13 +01:00

thread_state.hh

sim: Refactor the serialization base class

2015-07-07 09:51:03 +01:00