9313294efe
Remove the line "For use for simulation and test purposes only" in files were AMD is the only copyright holder listed in the header. This happens to be the case for all files where this line exists, removing it completely from gem5. Change-Id: I623f266b002f564301b28774f49081099cfc60fd Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53943 Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
878 lines
33 KiB
Python
878 lines
33 KiB
Python
# Copyright (c) 2011-2015 Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice,
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# this list of conditions and the following disclaimer.
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#
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# 3. Neither the name of the copyright holder nor the names of its
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# contributors may be used to endorse or promote products derived from this
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# software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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import math
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import m5
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from m5.objects import *
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from m5.defines import buildEnv
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from m5.util import addToPath
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from .Ruby import create_topology
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from .Ruby import send_evicts
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from common import FileSystemConfig
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addToPath('../')
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from topologies.Cluster import Cluster
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from topologies.Crossbar import Crossbar
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class CntrlBase:
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_seqs = 0
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@classmethod
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def seqCount(cls):
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# Use SeqCount not class since we need global count
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CntrlBase._seqs += 1
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return CntrlBase._seqs - 1
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_cntrls = 0
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@classmethod
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def cntrlCount(cls):
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# Use CntlCount not class since we need global count
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CntrlBase._cntrls += 1
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return CntrlBase._cntrls - 1
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_version = 0
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@classmethod
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def versionCount(cls):
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cls._version += 1 # Use count for this particular type
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return cls._version - 1
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class L1Cache(RubyCache):
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resourceStalls = False
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dataArrayBanks = 2
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tagArrayBanks = 2
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dataAccessLatency = 1
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tagAccessLatency = 1
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def create(self, size, assoc, options):
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self.size = MemorySize(size)
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self.assoc = assoc
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self.replacement_policy = TreePLRURP()
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class L2Cache(RubyCache):
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resourceStalls = False
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assoc = 16
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dataArrayBanks = 16
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tagArrayBanks = 16
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def create(self, size, assoc, options):
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self.size = MemorySize(size)
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self.assoc = assoc
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self.replacement_policy = TreePLRURP()
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class CPCntrl(CorePair_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1Icache = L1Cache()
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self.L1Icache.create(options.l1i_size, options.l1i_assoc, options)
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self.L1D0cache = L1Cache()
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self.L1D0cache.create(options.l1d_size, options.l1d_assoc, options)
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self.L1D1cache = L1Cache()
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self.L1D1cache.create(options.l1d_size, options.l1d_assoc, options)
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self.L2cache = L2Cache()
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self.L2cache.create(options.l2_size, options.l2_assoc, options)
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.dcache = self.L1D0cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.coreid = 0
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self.sequencer.is_cpu_sequencer = True
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self.sequencer1 = RubySequencer()
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self.sequencer1.version = self.seqCount()
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self.sequencer1.dcache = self.L1D1cache
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self.sequencer1.ruby_system = ruby_system
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self.sequencer1.coreid = 1
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self.sequencer1.is_cpu_sequencer = True
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self.issue_latency = options.cpu_to_dir_latency
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self.send_evictions = send_evicts(options)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class TCPCache(RubyCache):
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size = "16kB"
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assoc = 16
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dataArrayBanks = 16 #number of data banks
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tagArrayBanks = 16 #number of tag banks
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dataAccessLatency = 4
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tagAccessLatency = 1
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def create(self, options):
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self.size = MemorySize(options.tcp_size)
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self.assoc = options.tcp_assoc
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self.resourceStalls = options.no_tcc_resource_stalls
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self.replacement_policy = TreePLRURP()
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class TCPCntrl(TCP_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = TCPCache(tagAccessLatency = options.TCP_latency,
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dataAccessLatency = options.TCP_latency)
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self.L1cache.resourceStalls = options.no_resource_stalls
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self.L1cache.create(options)
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self.issue_latency = 1
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self.coalescer = VIPERCoalescer()
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self.coalescer.version = self.seqCount()
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self.coalescer.icache = self.L1cache
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self.coalescer.dcache = self.L1cache
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self.coalescer.ruby_system = ruby_system
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self.coalescer.support_inst_reqs = False
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self.coalescer.is_cpu_sequencer = False
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if options.tcp_deadlock_threshold:
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self.coalescer.deadlock_threshold = \
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options.tcp_deadlock_threshold
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self.coalescer.max_coalesces_per_cycle = \
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options.max_coalesces_per_cycle
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.is_cpu_sequencer = True
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self.use_seq_not_coal = False
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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def createCP(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = TCPCache(tagAccessLatency = options.TCP_latency,
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dataAccessLatency = options.TCP_latency)
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self.L1cache.resourceStalls = options.no_resource_stalls
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self.L1cache.create(options)
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self.issue_latency = 1
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self.coalescer = VIPERCoalescer()
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self.coalescer.version = self.seqCount()
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self.coalescer.icache = self.L1cache
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self.coalescer.dcache = self.L1cache
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self.coalescer.ruby_system = ruby_system
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self.coalescer.support_inst_reqs = False
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self.coalescer.is_cpu_sequencer = False
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.is_cpu_sequencer = True
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self.use_seq_not_coal = True
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class SQCCache(RubyCache):
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dataArrayBanks = 8
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tagArrayBanks = 8
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dataAccessLatency = 1
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tagAccessLatency = 1
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def create(self, options):
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self.size = MemorySize(options.sqc_size)
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self.assoc = options.sqc_assoc
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self.replacement_policy = TreePLRURP()
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class SQCCntrl(SQC_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L1cache = SQCCache()
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self.L1cache.create(options)
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self.L1cache.resourceStalls = options.no_resource_stalls
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self.sequencer = RubySequencer()
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self.sequencer.version = self.seqCount()
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self.sequencer.dcache = self.L1cache
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self.sequencer.ruby_system = ruby_system
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self.sequencer.support_data_reqs = False
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self.sequencer.is_cpu_sequencer = False
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if options.sqc_deadlock_threshold:
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self.sequencer.deadlock_threshold = \
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options.sqc_deadlock_threshold
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class TCC(RubyCache):
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size = MemorySize("256kB")
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assoc = 16
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dataAccessLatency = 8
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tagAccessLatency = 2
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resourceStalls = True
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def create(self, options):
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self.assoc = options.tcc_assoc
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if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
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s = options.num_compute_units
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tcc_size = s * 128
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tcc_size = str(tcc_size)+'kB'
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self.size = MemorySize(tcc_size)
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self.dataArrayBanks = 64
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self.tagArrayBanks = 64
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else:
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self.size = MemorySize(options.tcc_size)
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self.dataArrayBanks = 256 / options.num_tccs #number of data banks
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self.tagArrayBanks = 256 / options.num_tccs #number of tag banks
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self.size.value = self.size.value / options.num_tccs
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if ((self.size.value / int(self.assoc)) < 128):
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self.size.value = int(128 * self.assoc)
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self.start_index_bit = math.log(options.cacheline_size, 2) + \
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math.log(options.num_tccs, 2)
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self.replacement_policy = TreePLRURP()
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class TCCCntrl(TCC_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L2cache = TCC()
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self.L2cache.create(options)
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self.L2cache.resourceStalls = options.no_tcc_resource_stalls
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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class L3Cache(RubyCache):
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dataArrayBanks = 16
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tagArrayBanks = 16
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def create(self, options, ruby_system, system):
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self.size = MemorySize(options.l3_size)
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self.size.value /= options.num_dirs
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self.assoc = options.l3_assoc
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self.dataArrayBanks /= options.num_dirs
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self.tagArrayBanks /= options.num_dirs
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self.dataArrayBanks /= options.num_dirs
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self.tagArrayBanks /= options.num_dirs
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self.dataAccessLatency = options.l3_data_latency
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self.tagAccessLatency = options.l3_tag_latency
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self.resourceStalls = False
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self.replacement_policy = TreePLRURP()
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class L3Cntrl(L3Cache_Controller, CntrlBase):
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def create(self, options, ruby_system, system):
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self.version = self.versionCount()
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self.L3cache = L3Cache()
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self.L3cache.create(options, ruby_system, system)
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self.l3_response_latency = max(self.L3cache.dataAccessLatency, self.L3cache.tagAccessLatency)
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
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req_to_l3, probe_to_l3, resp_to_l3):
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self.reqToDir = req_to_dir
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self.respToDir = resp_to_dir
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self.l3UnblockToDir = l3_unblock_to_dir
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self.reqToL3 = req_to_l3
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self.probeToL3 = probe_to_l3
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self.respToL3 = resp_to_l3
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class DirCntrl(Directory_Controller, CntrlBase):
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def create(self, options, dir_ranges, ruby_system, system):
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self.version = self.versionCount()
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self.response_latency = 30
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self.addr_ranges = dir_ranges
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self.directory = RubyDirectoryMemory()
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self.L3CacheMemory = L3Cache()
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self.L3CacheMemory.create(options, ruby_system, system)
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self.l3_hit_latency = max(self.L3CacheMemory.dataAccessLatency,
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self.L3CacheMemory.tagAccessLatency)
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self.number_of_TBEs = options.num_tbes
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self.ruby_system = ruby_system
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if options.recycle_latency:
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self.recycle_latency = options.recycle_latency
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def connectWireBuffers(self, req_to_dir, resp_to_dir, l3_unblock_to_dir,
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req_to_l3, probe_to_l3, resp_to_l3):
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self.reqToDir = req_to_dir
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self.respToDir = resp_to_dir
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self.l3UnblockToDir = l3_unblock_to_dir
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self.reqToL3 = req_to_l3
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self.probeToL3 = probe_to_l3
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self.respToL3 = resp_to_l3
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def define_options(parser):
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parser.add_argument("--num-subcaches", type=int, default=4)
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parser.add_argument("--l3-data-latency", type=int, default=20)
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parser.add_argument("--l3-tag-latency", type=int, default=15)
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parser.add_argument("--cpu-to-dir-latency", type=int, default=120)
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parser.add_argument("--gpu-to-dir-latency", type=int, default=120)
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parser.add_argument("--no-resource-stalls", action="store_false",
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default=True)
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parser.add_argument("--no-tcc-resource-stalls", action="store_false",
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default=True)
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parser.add_argument("--use-L3-on-WT", action="store_true", default=False)
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parser.add_argument("--num-tbes", type=int, default=256)
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parser.add_argument("--l2-latency", type=int, default=50) # load to use
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parser.add_argument("--num-tccs", type=int, default=1,
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help="number of TCC banks in the GPU")
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parser.add_argument("--sqc-size", type=str, default='32kB',
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help="SQC cache size")
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parser.add_argument("--sqc-assoc", type=int, default=8,
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help="SQC cache assoc")
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parser.add_argument("--sqc-deadlock-threshold", type=int,
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help="Set the SQC deadlock threshold to some value")
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parser.add_argument("--WB_L1", action="store_true", default=False,
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help="writeback L1")
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parser.add_argument("--WB_L2", action="store_true", default=False,
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help="writeback L2")
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parser.add_argument("--TCP_latency", type=int, default=4,
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help="TCP latency")
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parser.add_argument("--TCC_latency", type=int, default=16,
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help="TCC latency")
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parser.add_argument("--tcc-size", type=str, default='256kB',
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help="agregate tcc size")
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parser.add_argument("--tcc-assoc", type=int, default=16,
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help="tcc assoc")
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parser.add_argument("--tcp-size", type=str, default='16kB',
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help="tcp size")
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parser.add_argument("--tcp-assoc", type=int, default=16,
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help="tcp assoc")
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parser.add_argument("--tcp-deadlock-threshold", type=int,
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help="Set the TCP deadlock threshold to some value")
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parser.add_argument("--max-coalesces-per-cycle", type=int, default=1,
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help="Maximum insts that may coalesce in a cycle")
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parser.add_argument("--noL1", action="store_true", default=False,
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help="bypassL1")
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parser.add_argument("--scalar-buffer-size", type=int, default=128,
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help="Size of the mandatory queue in the GPU scalar "
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"cache controller")
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def construct_dirs(options, system, ruby_system, network):
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dir_cntrl_nodes = []
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# For an odd number of CPUs, still create the right number of controllers
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TCC_bits = int(math.log(options.num_tccs, 2))
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if options.numa_high_bit:
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numa_bit = options.numa_high_bit
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else:
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# if the numa_bit is not specified, set the directory bits as the
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# lowest bits above the block offset bits, and the numa_bit as the
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# highest of those directory bits
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dir_bits = int(math.log(options.num_dirs, 2))
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block_size_bits = int(math.log(options.cacheline_size, 2))
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numa_bit = block_size_bits + dir_bits - 1
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for i in range(options.num_dirs):
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dir_ranges = []
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for r in system.mem_ranges:
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addr_range = m5.objects.AddrRange(r.start, size = r.size(),
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intlvHighBit = numa_bit,
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intlvBits = dir_bits,
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intlvMatch = i)
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dir_ranges.append(addr_range)
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dir_cntrl = DirCntrl(noTCCdir = True, TCC_select_num_bits = TCC_bits)
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dir_cntrl.create(options, dir_ranges, ruby_system, system)
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dir_cntrl.number_of_TBEs = options.num_tbes
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dir_cntrl.useL3OnWT = options.use_L3_on_WT
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# the number_of_TBEs is inclusive of TBEs below
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# Connect the Directory controller to the ruby network
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dir_cntrl.requestFromCores = MessageBuffer(ordered = True)
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dir_cntrl.requestFromCores.in_port = network.out_port
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dir_cntrl.responseFromCores = MessageBuffer()
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dir_cntrl.responseFromCores.in_port = network.out_port
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dir_cntrl.unblockFromCores = MessageBuffer()
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dir_cntrl.unblockFromCores.in_port = network.out_port
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dir_cntrl.probeToCore = MessageBuffer()
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dir_cntrl.probeToCore.out_port = network.in_port
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dir_cntrl.responseToCore = MessageBuffer()
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dir_cntrl.responseToCore.out_port = network.in_port
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dir_cntrl.triggerQueue = MessageBuffer(ordered = True)
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dir_cntrl.L3triggerQueue = MessageBuffer(ordered = True)
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dir_cntrl.requestToMemory = MessageBuffer()
|
|
dir_cntrl.responseFromMemory = MessageBuffer()
|
|
|
|
dir_cntrl.requestFromDMA = MessageBuffer(ordered=True)
|
|
dir_cntrl.requestFromDMA.in_port = network.out_port
|
|
|
|
dir_cntrl.responseToDMA = MessageBuffer()
|
|
dir_cntrl.responseToDMA.out_port = network.in_port
|
|
|
|
dir_cntrl.requestToMemory = MessageBuffer()
|
|
dir_cntrl.responseFromMemory = MessageBuffer()
|
|
|
|
exec("ruby_system.dir_cntrl%d = dir_cntrl" % i)
|
|
dir_cntrl_nodes.append(dir_cntrl)
|
|
|
|
return dir_cntrl_nodes
|
|
|
|
def construct_corepairs(options, system, ruby_system, network):
|
|
|
|
cpu_sequencers = []
|
|
cp_cntrl_nodes = []
|
|
|
|
for i in range((options.num_cpus + 1) // 2):
|
|
|
|
cp_cntrl = CPCntrl()
|
|
cp_cntrl.create(options, ruby_system, system)
|
|
|
|
exec("ruby_system.cp_cntrl%d = cp_cntrl" % i)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
cpu_sequencers.extend([cp_cntrl.sequencer, cp_cntrl.sequencer1])
|
|
|
|
# Connect the CP controllers and the network
|
|
cp_cntrl.requestFromCore = MessageBuffer()
|
|
cp_cntrl.requestFromCore.out_port = network.in_port
|
|
|
|
cp_cntrl.responseFromCore = MessageBuffer()
|
|
cp_cntrl.responseFromCore.out_port = network.in_port
|
|
|
|
cp_cntrl.unblockFromCore = MessageBuffer()
|
|
cp_cntrl.unblockFromCore.out_port = network.in_port
|
|
|
|
cp_cntrl.probeToCore = MessageBuffer()
|
|
cp_cntrl.probeToCore.in_port = network.out_port
|
|
|
|
cp_cntrl.responseToCore = MessageBuffer()
|
|
cp_cntrl.responseToCore.in_port = network.out_port
|
|
|
|
cp_cntrl.mandatoryQueue = MessageBuffer()
|
|
cp_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
cp_cntrl_nodes.append(cp_cntrl)
|
|
|
|
return (cpu_sequencers, cp_cntrl_nodes)
|
|
|
|
def construct_tcps(options, system, ruby_system, network):
|
|
|
|
tcp_sequencers = []
|
|
tcp_cntrl_nodes = []
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
TCC_bits = int(math.log(options.num_tccs, 2))
|
|
|
|
for i in range(options.num_compute_units):
|
|
|
|
tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
|
|
issue_latency = 1,
|
|
number_of_TBEs = 2560)
|
|
# TBEs set to max outstanding requests
|
|
tcp_cntrl.create(options, ruby_system, system)
|
|
tcp_cntrl.WB = options.WB_L1
|
|
tcp_cntrl.disableL1 = options.noL1
|
|
tcp_cntrl.L1cache.tagAccessLatency = options.TCP_latency
|
|
tcp_cntrl.L1cache.dataAccessLatency = options.TCP_latency
|
|
|
|
exec("ruby_system.tcp_cntrl%d = tcp_cntrl" % i)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
tcp_sequencers.append(tcp_cntrl.coalescer)
|
|
tcp_cntrl_nodes.append(tcp_cntrl)
|
|
|
|
# Connect the TCP controller to the ruby network
|
|
tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.requestFromTCP.out_port = network.in_port
|
|
|
|
tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.responseFromTCP.out_port = network.in_port
|
|
|
|
tcp_cntrl.unblockFromCore = MessageBuffer()
|
|
tcp_cntrl.unblockFromCore.out_port = network.in_port
|
|
|
|
tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.probeToTCP.in_port = network.out_port
|
|
|
|
tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.responseToTCP.in_port = network.out_port
|
|
|
|
tcp_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
return (tcp_sequencers, tcp_cntrl_nodes)
|
|
|
|
def construct_sqcs(options, system, ruby_system, network):
|
|
|
|
sqc_sequencers = []
|
|
sqc_cntrl_nodes = []
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
TCC_bits = int(math.log(options.num_tccs, 2))
|
|
|
|
for i in range(options.num_sqc):
|
|
|
|
sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
|
|
sqc_cntrl.create(options, ruby_system, system)
|
|
|
|
exec("ruby_system.sqc_cntrl%d = sqc_cntrl" % i)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
sqc_sequencers.append(sqc_cntrl.sequencer)
|
|
sqc_cntrl_nodes.append(sqc_cntrl)
|
|
|
|
# Connect the SQC controller to the ruby network
|
|
sqc_cntrl.requestFromSQC = MessageBuffer(ordered = True)
|
|
sqc_cntrl.requestFromSQC.out_port = network.in_port
|
|
|
|
sqc_cntrl.probeToSQC = MessageBuffer(ordered = True)
|
|
sqc_cntrl.probeToSQC.in_port = network.out_port
|
|
|
|
sqc_cntrl.responseToSQC = MessageBuffer(ordered = True)
|
|
sqc_cntrl.responseToSQC.in_port = network.out_port
|
|
|
|
sqc_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
return (sqc_sequencers, sqc_cntrl_nodes)
|
|
|
|
def construct_scalars(options, system, ruby_system, network):
|
|
|
|
scalar_sequencers = []
|
|
scalar_cntrl_nodes = []
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
TCC_bits = int(math.log(options.num_tccs, 2))
|
|
|
|
for i in range(options.num_scalar_cache):
|
|
scalar_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
|
|
scalar_cntrl.create(options, ruby_system, system)
|
|
|
|
exec('ruby_system.scalar_cntrl%d = scalar_cntrl' % i)
|
|
|
|
scalar_sequencers.append(scalar_cntrl.sequencer)
|
|
scalar_cntrl_nodes.append(scalar_cntrl)
|
|
|
|
scalar_cntrl.requestFromSQC = MessageBuffer(ordered = True)
|
|
scalar_cntrl.requestFromSQC.out_port = network.in_port
|
|
|
|
scalar_cntrl.probeToSQC = MessageBuffer(ordered = True)
|
|
scalar_cntrl.probeToSQC.in_port = network.out_port
|
|
|
|
scalar_cntrl.responseToSQC = MessageBuffer(ordered = True)
|
|
scalar_cntrl.responseToSQC.in_port = network.out_port
|
|
|
|
scalar_cntrl.mandatoryQueue = \
|
|
MessageBuffer(buffer_size=options.scalar_buffer_size)
|
|
|
|
return (scalar_sequencers, scalar_cntrl_nodes)
|
|
|
|
def construct_cmdprocs(options, system, ruby_system, network):
|
|
|
|
cmdproc_sequencers = []
|
|
cmdproc_cntrl_nodes = []
|
|
|
|
# For an odd number of CPUs, still create the right number of controllers
|
|
TCC_bits = int(math.log(options.num_tccs, 2))
|
|
|
|
for i in range(options.num_cp):
|
|
|
|
tcp_ID = options.num_compute_units + i
|
|
sqc_ID = options.num_sqc + i
|
|
|
|
tcp_cntrl = TCPCntrl(TCC_select_num_bits = TCC_bits,
|
|
issue_latency = 1,
|
|
number_of_TBEs = 2560)
|
|
# TBEs set to max outstanding requests
|
|
tcp_cntrl.createCP(options, ruby_system, system)
|
|
tcp_cntrl.WB = options.WB_L1
|
|
tcp_cntrl.disableL1 = options.noL1
|
|
tcp_cntrl.L1cache.tagAccessLatency = options.TCP_latency
|
|
tcp_cntrl.L1cache.dataAccessLatency = options.TCP_latency
|
|
|
|
exec("ruby_system.tcp_cntrl%d = tcp_cntrl" % tcp_ID)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
cmdproc_sequencers.append(tcp_cntrl.sequencer)
|
|
cmdproc_cntrl_nodes.append(tcp_cntrl)
|
|
|
|
# Connect the CP (TCP) controllers to the ruby network
|
|
tcp_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.requestFromTCP.out_port = network.in_port
|
|
|
|
tcp_cntrl.responseFromTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.responseFromTCP.out_port = network.in_port
|
|
|
|
tcp_cntrl.unblockFromCore = MessageBuffer(ordered = True)
|
|
tcp_cntrl.unblockFromCore.out_port = network.in_port
|
|
|
|
tcp_cntrl.probeToTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.probeToTCP.in_port = network.out_port
|
|
|
|
tcp_cntrl.responseToTCP = MessageBuffer(ordered = True)
|
|
tcp_cntrl.responseToTCP.in_port = network.out_port
|
|
|
|
tcp_cntrl.mandatoryQueue = MessageBuffer()
|
|
|
|
sqc_cntrl = SQCCntrl(TCC_select_num_bits = TCC_bits)
|
|
sqc_cntrl.create(options, ruby_system, system)
|
|
|
|
exec("ruby_system.sqc_cntrl%d = sqc_cntrl" % sqc_ID)
|
|
#
|
|
# Add controllers and sequencers to the appropriate lists
|
|
#
|
|
cmdproc_sequencers.append(sqc_cntrl.sequencer)
|
|
cmdproc_cntrl_nodes.append(sqc_cntrl)
|
|
|
|
return (cmdproc_sequencers, cmdproc_cntrl_nodes)
|
|
|
|
def construct_tccs(options, system, ruby_system, network):
|
|
|
|
tcc_cntrl_nodes = []
|
|
|
|
for i in range(options.num_tccs):
|
|
|
|
tcc_cntrl = TCCCntrl(l2_response_latency = options.TCC_latency)
|
|
tcc_cntrl.create(options, ruby_system, system)
|
|
tcc_cntrl.l2_request_latency = options.gpu_to_dir_latency
|
|
tcc_cntrl.l2_response_latency = options.TCC_latency
|
|
tcc_cntrl_nodes.append(tcc_cntrl)
|
|
tcc_cntrl.WB = options.WB_L2
|
|
tcc_cntrl.number_of_TBEs = 2560 * options.num_compute_units
|
|
# the number_of_TBEs is inclusive of TBEs below
|
|
|
|
# Connect the TCC controllers to the ruby network
|
|
tcc_cntrl.requestFromTCP = MessageBuffer(ordered = True)
|
|
tcc_cntrl.requestFromTCP.in_port = network.out_port
|
|
|
|
tcc_cntrl.responseToCore = MessageBuffer(ordered = True)
|
|
tcc_cntrl.responseToCore.out_port = network.in_port
|
|
|
|
tcc_cntrl.probeFromNB = MessageBuffer()
|
|
tcc_cntrl.probeFromNB.in_port = network.out_port
|
|
|
|
tcc_cntrl.responseFromNB = MessageBuffer()
|
|
tcc_cntrl.responseFromNB.in_port = network.out_port
|
|
|
|
tcc_cntrl.requestToNB = MessageBuffer(ordered = True)
|
|
tcc_cntrl.requestToNB.out_port = network.in_port
|
|
|
|
tcc_cntrl.responseToNB = MessageBuffer()
|
|
tcc_cntrl.responseToNB.out_port = network.in_port
|
|
|
|
tcc_cntrl.unblockToNB = MessageBuffer()
|
|
tcc_cntrl.unblockToNB.out_port = network.in_port
|
|
|
|
tcc_cntrl.triggerQueue = MessageBuffer(ordered = True)
|
|
|
|
exec("ruby_system.tcc_cntrl%d = tcc_cntrl" % i)
|
|
|
|
return tcc_cntrl_nodes
|
|
|
|
def create_system(options, full_system, system, dma_devices, bootmem,
|
|
ruby_system, cpus):
|
|
if buildEnv['PROTOCOL'] != 'GPU_VIPER':
|
|
panic("This script requires the GPU_VIPER protocol to be built.")
|
|
|
|
cpu_sequencers = []
|
|
|
|
#
|
|
# Must create the individual controllers before the network to ensure the
|
|
# controller constructors are called before the network constructor
|
|
#
|
|
|
|
# This is the base crossbar that connects the L3s, Dirs, and cpu/gpu
|
|
# Clusters
|
|
crossbar_bw = None
|
|
mainCluster = None
|
|
cpuCluster = None
|
|
gpuCluster = None
|
|
|
|
if hasattr(options, 'bw_scalor') and options.bw_scalor > 0:
|
|
#Assuming a 2GHz clock
|
|
crossbar_bw = 16 * options.num_compute_units * options.bw_scalor
|
|
mainCluster = Cluster(intBW = crossbar_bw)
|
|
cpuCluster = Cluster(extBW = crossbar_bw, intBW = crossbar_bw)
|
|
gpuCluster = Cluster(extBW = crossbar_bw, intBW = crossbar_bw)
|
|
else:
|
|
mainCluster = Cluster(intBW = 8) # 16 GB/s
|
|
cpuCluster = Cluster(extBW = 8, intBW = 8) # 16 GB/s
|
|
gpuCluster = Cluster(extBW = 8, intBW = 8) # 16 GB/s
|
|
|
|
|
|
# Create CPU directory controllers
|
|
dir_cntrl_nodes = \
|
|
construct_dirs(options, system, ruby_system, ruby_system.network)
|
|
for dir_cntrl in dir_cntrl_nodes:
|
|
mainCluster.add(dir_cntrl)
|
|
|
|
|
|
# Create CPU core pairs
|
|
(cp_sequencers, cp_cntrl_nodes) = \
|
|
construct_corepairs(options, system, ruby_system, ruby_system.network)
|
|
cpu_sequencers.extend(cp_sequencers)
|
|
for cp_cntrl in cp_cntrl_nodes:
|
|
cpuCluster.add(cp_cntrl)
|
|
|
|
# Register CPUs and caches for each CorePair and directory (SE mode only)
|
|
if not full_system:
|
|
for i in range((options.num_cpus + 1) // 2):
|
|
FileSystemConfig.register_cpu(physical_package_id = 0,
|
|
core_siblings = \
|
|
range(options.num_cpus),
|
|
core_id = i*2,
|
|
thread_siblings = [])
|
|
|
|
FileSystemConfig.register_cpu(physical_package_id = 0,
|
|
core_siblings = \
|
|
range(options.num_cpus),
|
|
core_id = i*2+1,
|
|
thread_siblings = [])
|
|
|
|
FileSystemConfig.register_cache(level = 0,
|
|
idu_type = 'Instruction',
|
|
size = options.l1i_size,
|
|
line_size = options.cacheline_size,
|
|
assoc = options.l1i_assoc,
|
|
cpus = [i*2, i*2+1])
|
|
|
|
FileSystemConfig.register_cache(level = 0,
|
|
idu_type = 'Data',
|
|
size = options.l1d_size,
|
|
line_size = options.cacheline_size,
|
|
assoc = options.l1d_assoc,
|
|
cpus = [i*2])
|
|
|
|
FileSystemConfig.register_cache(level = 0,
|
|
idu_type = 'Data',
|
|
size = options.l1d_size,
|
|
line_size = options.cacheline_size,
|
|
assoc = options.l1d_assoc,
|
|
cpus = [i*2+1])
|
|
|
|
FileSystemConfig.register_cache(level = 1,
|
|
idu_type = 'Unified',
|
|
size = options.l2_size,
|
|
line_size = options.cacheline_size,
|
|
assoc = options.l2_assoc,
|
|
cpus = [i*2, i*2+1])
|
|
|
|
for i in range(options.num_dirs):
|
|
FileSystemConfig.register_cache(level = 2,
|
|
idu_type = 'Unified',
|
|
size = options.l3_size,
|
|
line_size = options.cacheline_size,
|
|
assoc = options.l3_assoc,
|
|
cpus = [n for n in
|
|
range(options.num_cpus)])
|
|
|
|
# Create TCPs
|
|
(tcp_sequencers, tcp_cntrl_nodes) = \
|
|
construct_tcps(options, system, ruby_system, ruby_system.network)
|
|
cpu_sequencers.extend(tcp_sequencers)
|
|
for tcp_cntrl in tcp_cntrl_nodes:
|
|
gpuCluster.add(tcp_cntrl)
|
|
|
|
# Create SQCs
|
|
(sqc_sequencers, sqc_cntrl_nodes) = \
|
|
construct_sqcs(options, system, ruby_system, ruby_system.network)
|
|
cpu_sequencers.extend(sqc_sequencers)
|
|
for sqc_cntrl in sqc_cntrl_nodes:
|
|
gpuCluster.add(sqc_cntrl)
|
|
|
|
# Create Scalars
|
|
(scalar_sequencers, scalar_cntrl_nodes) = \
|
|
construct_scalars(options, system, ruby_system, ruby_system.network)
|
|
cpu_sequencers.extend(scalar_sequencers)
|
|
for scalar_cntrl in scalar_cntrl_nodes:
|
|
gpuCluster.add(scalar_cntrl)
|
|
|
|
# Create command processors
|
|
(cmdproc_sequencers, cmdproc_cntrl_nodes) = \
|
|
construct_cmdprocs(options, system, ruby_system, ruby_system.network)
|
|
cpu_sequencers.extend(cmdproc_sequencers)
|
|
for cmdproc_cntrl in cmdproc_cntrl_nodes:
|
|
gpuCluster.add(cmdproc_cntrl)
|
|
|
|
# Create TCCs
|
|
tcc_cntrl_nodes = \
|
|
construct_tccs(options, system, ruby_system, ruby_system.network)
|
|
for tcc_cntrl in tcc_cntrl_nodes:
|
|
gpuCluster.add(tcc_cntrl)
|
|
|
|
for i, dma_device in enumerate(dma_devices):
|
|
dma_seq = DMASequencer(version=i, ruby_system=ruby_system)
|
|
dma_cntrl = DMA_Controller(version=i, dma_sequencer=dma_seq,
|
|
ruby_system=ruby_system)
|
|
exec('system.dma_cntrl%d = dma_cntrl' % i)
|
|
|
|
# IDE doesn't have a .type but seems like everything else does.
|
|
if not hasattr(dma_device, 'type'):
|
|
exec('system.dma_cntrl%d.dma_sequencer.in_ports = dma_device' % i)
|
|
elif dma_device.type == 'MemTest':
|
|
exec('system.dma_cntrl%d.dma_sequencer.in_ports = dma_devices.test'
|
|
% i)
|
|
else:
|
|
exec('system.dma_cntrl%d.dma_sequencer.in_ports = dma_device.dma'
|
|
% i)
|
|
|
|
dma_cntrl.requestToDir = MessageBuffer(buffer_size=0)
|
|
dma_cntrl.requestToDir.out_port = ruby_system.network.in_port
|
|
dma_cntrl.responseFromDir = MessageBuffer(buffer_size=0)
|
|
dma_cntrl.responseFromDir.in_port = ruby_system.network.out_port
|
|
dma_cntrl.mandatoryQueue = MessageBuffer(buffer_size = 0)
|
|
gpuCluster.add(dma_cntrl)
|
|
|
|
# Add cpu/gpu clusters to main cluster
|
|
mainCluster.add(cpuCluster)
|
|
mainCluster.add(gpuCluster)
|
|
|
|
ruby_system.network.number_of_virtual_networks = 11
|
|
|
|
return (cpu_sequencers, dir_cntrl_nodes, mainCluster)
|