e6c0ba97db
This makes what are configuration and what are internal SCons variables explicit and separate, and makes it unnecessary to call out what variables to export to C++. These variables will also be plumbed into and out of kconfiglib in later changes. Change-Id: Iaf5e098d7404af06285c421dbdf8ef4171b3f001 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56892 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
67 lines
3.1 KiB
Python
67 lines
3.1 KiB
Python
# -*- mode:python -*-
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# Copyright (c) 2009 The University of Edinburgh
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# Copyright (c) 2020 LabWare
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# Copyright (c) 2021 IBM Corporation
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Import('*')
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Source('decoder.cc', tags='power isa')
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Source('faults.cc', tags='power isa')
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Source('insts/branch.cc', tags='power isa')
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Source('insts/mem.cc', tags='power isa')
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Source('insts/integer.cc', tags='power isa')
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Source('insts/floating.cc', tags='power isa')
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Source('insts/condition.cc', tags='power isa')
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Source('insts/static_inst.cc', tags='power isa')
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Source('linux/se_workload.cc', tags='power isa')
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Source('isa.cc', tags='power isa')
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Source('pagetable.cc', tags='power isa')
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Source('process.cc', tags='power isa')
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Source('remote_gdb.cc', tags='power isa')
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Source('se_workload.cc', tags='power isa')
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Source('tlb.cc', tags='power isa')
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SimObject('PowerDecoder.py', sim_objects=['PowerDecoder'], tags='power isa')
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SimObject('PowerInterrupts.py', sim_objects=['PowerInterrupts'],
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tags='power isa')
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SimObject('PowerISA.py', sim_objects=['PowerISA'], tags='power isa')
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SimObject('PowerMMU.py', sim_objects=['PowerMMU'], tags='power isa')
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SimObject('PowerSeWorkload.py', sim_objects=[
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'PowerSEWorkload', 'PowerEmuLinux'], tags='power isa')
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SimObject('PowerTLB.py', sim_objects=['PowerTLB'], tags='power isa')
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SimObject('PowerCPU.py', sim_objects=[], tags='power isa')
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SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='power isa')
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SimObject('TimingSimpleCPU.py', sim_objects=[], tags='power isa')
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SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='power isa')
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SimObject('O3CPU.py', sim_objects=[], tags='power isa')
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DebugFlag('Power', tags='power isa')
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ISADesc('isa/main.isa', tags='power isa')
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