403817cd0d
Previously, the RISC-V devices queried the system object in SimObject::init() for the number of CPUs and the number of threads. However, the system object doesn't actually count the number of CPUs/threads until it runs init(). Therefore, we've just been getting lucky in the order that the SimObject init() functions were called. This change instead decouples these two functions and makes the number of CPUs/threads a parameter for the RISC-V interrupt devices. This change also updates the example config script. Change-Id: Ic4da5604156837cfeec05e58d188b42a02420de1 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49431 Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>