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3f9e352de4e1ac34e1f0b83c3f66af2175b524f4
gem5/configs/common
History
Ali Saidi 6a6d888ab4 cpu2000: Add missing art benchmark to all
2012-01-09 18:08:20 -06:00
..
Benchmarks.py
ARM: Update config files for Android/BBench images available on website.
2011-12-15 00:43:35 -05:00
CacheConfig.py
configs: cache: add cache line size option
2011-02-23 14:26:55 -05:00
Caches.py
O3: Remove hardcoded tgts_per_mshr in O3CPU.py.
2011-12-01 00:15:22 -08:00
cpu2000.py
cpu2000: Add missing art benchmark to all
2012-01-09 18:08:20 -06:00
FSConfig.py
ARM: Update config files for Android/BBench images available on website.
2011-12-15 00:43:35 -05:00
Options.py
Config: Add an option of type 'choice' for cpu type
2012-01-05 11:04:25 -06:00
Simulation.py
Config: Add an option of type 'choice' for cpu type
2012-01-05 11:04:25 -06:00
SysPaths.py
make rcS files read from the m5 source directory, not /dist.
2006-11-08 14:10:25 -05:00
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