into Python.
Add Port and VectorPort objects and support for
specifying port connections via assignment.
The whole C++ ConfigNode hierarchy is gone now, as are
C++ Connector objects.
configs/test/fs.py:
configs/test/test.py:
Rewrite for new port connector syntax.
src/SConscript:
Remove unneeded files:
- mem/connector.*
- sim/config*
src/dev/io_device.hh:
src/mem/bridge.cc:
src/mem/bridge.hh:
src/mem/bus.cc:
src/mem/bus.hh:
src/mem/mem_object.hh:
src/mem/physical.cc:
src/mem/physical.hh:
Allow getPort() to take an optional index to
support vector ports (eventually).
src/python/m5/__init__.py:
Move SimObject construction and port connection
operations into Python (with C++ calls).
src/python/m5/config.py:
Move SimObject construction and port connection
operations into Python (with C++ calls).
Add support for declaring and connecting MemObject
ports in Python.
src/python/m5/objects/Bus.py:
src/python/m5/objects/PhysicalMemory.py:
Add port declaration.
src/sim/builder.cc:
src/sim/builder.hh:
src/sim/serialize.cc:
src/sim/serialize.hh:
ConfigNodes are gone; builder just gets the
name of a .ini file section now.
src/sim/main.cc:
Move SimObject construction and port connection
operations into Python (with C++ calls).
Split remaining initialization operations into two parts,
loadIniFile() and finalInit().
src/sim/param.cc:
src/sim/param.hh:
SimObject resolution done globally in Python now
(not via ConfigNode hierarchy).
src/sim/sim_object.cc:
Remove unneeded #include.
--HG--
extra : convert_revision : 2fa4001eaaec0c9a4231ef6e854f8e156d930dfe
379 lines
9.9 KiB
C++
379 lines
9.9 KiB
C++
/*
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* Copyright (c) 2001-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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*/
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <zlib.h>
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#include <iostream>
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#include <string>
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#include "base/misc.hh"
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#include "config/full_system.hh"
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#include "mem/packet_impl.hh"
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#include "mem/physical.hh"
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#include "sim/host.hh"
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#include "sim/builder.hh"
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#include "sim/eventq.hh"
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#include "arch/isa_traits.hh"
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using namespace std;
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using namespace TheISA;
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PhysicalMemory::MemResponseEvent::MemResponseEvent(Packet *pkt, MemoryPort* _m)
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: Event(&mainEventQueue, CPU_Tick_Pri), pkt(pkt), memoryPort(_m)
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{
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this->setFlags(AutoDelete);
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}
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void
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PhysicalMemory::MemResponseEvent::process()
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{
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memoryPort->sendTiming(pkt);
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}
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const char *
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PhysicalMemory::MemResponseEvent::description()
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{
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return "Physical Memory Timing Access respnse event";
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}
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PhysicalMemory::PhysicalMemory(const string &n, Tick latency)
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: MemObject(n),base_addr(0), pmem_addr(NULL), port(NULL), lat(latency)
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{
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// Hardcoded to 128 MB for now.
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pmem_size = 1 << 27;
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if (pmem_size % TheISA::PageBytes != 0)
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panic("Memory Size not divisible by page size\n");
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int map_flags = MAP_ANON | MAP_PRIVATE;
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pmem_addr = (uint8_t *)mmap(NULL, pmem_size, PROT_READ | PROT_WRITE,
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map_flags, -1, 0);
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if (pmem_addr == (void *)MAP_FAILED) {
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perror("mmap");
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fatal("Could not mmap!\n");
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}
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page_ptr = 0;
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}
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void
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PhysicalMemory::init()
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{
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if (!port)
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panic("PhysicalMemory not connected to anything!");
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port->sendStatusChange(Port::RangeChange);
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}
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PhysicalMemory::~PhysicalMemory()
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{
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if (pmem_addr)
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munmap(pmem_addr, pmem_size);
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//Remove memPorts?
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}
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Addr
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PhysicalMemory::new_page()
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{
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Addr return_addr = page_ptr << LogVMPageSize;
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return_addr += base_addr;
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++page_ptr;
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return return_addr;
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}
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int
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PhysicalMemory::deviceBlockSize()
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{
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//Can accept anysize request
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return 0;
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}
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bool
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PhysicalMemory::doTimingAccess (Packet *pkt, MemoryPort* memoryPort)
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{
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doFunctionalAccess(pkt);
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// turn packet around to go back to requester
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pkt->makeTimingResponse();
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MemResponseEvent* response = new MemResponseEvent(pkt, memoryPort);
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response->schedule(curTick + lat);
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return true;
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}
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Tick
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PhysicalMemory::doAtomicAccess(Packet *pkt)
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{
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doFunctionalAccess(pkt);
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return lat;
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}
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void
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PhysicalMemory::doFunctionalAccess(Packet *pkt)
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{
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assert(pkt->getAddr() + pkt->getSize() < pmem_size);
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switch (pkt->cmd) {
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case Packet::ReadReq:
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memcpy(pkt->getPtr<uint8_t>(),
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pmem_addr + pkt->getAddr() - base_addr,
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pkt->getSize());
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break;
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case Packet::WriteReq:
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memcpy(pmem_addr + pkt->getAddr() - base_addr,
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pkt->getPtr<uint8_t>(),
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pkt->getSize());
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// temporary hack: will need to add real LL/SC implementation
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// for cacheless systems later.
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if (pkt->req->getFlags() & LOCKED) {
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pkt->req->setScResult(1);
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}
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break;
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default:
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panic("unimplemented");
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}
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pkt->result = Packet::Success;
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}
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Port *
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PhysicalMemory::getPort(const std::string &if_name, int idx)
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{
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if (if_name == "port" && idx == -1) {
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if (port != NULL)
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panic("PhysicalMemory::getPort: additional port requested to memory!");
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port = new MemoryPort(name() + "-port", this);
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return port;
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} else if (if_name == "functional") {
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/* special port for functional writes at startup. */
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return new MemoryPort(name() + "-funcport", this);
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} else {
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panic("PhysicalMemory::getPort: unknown port %s requested", if_name);
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}
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}
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void
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PhysicalMemory::recvStatusChange(Port::Status status)
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{
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}
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PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name,
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PhysicalMemory *_memory)
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: Port(_name), memory(_memory)
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{ }
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void
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PhysicalMemory::MemoryPort::recvStatusChange(Port::Status status)
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{
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memory->recvStatusChange(status);
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}
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void
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PhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp,
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AddrRangeList &snoop)
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{
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memory->getAddressRanges(resp, snoop);
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}
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void
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PhysicalMemory::getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
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{
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snoop.clear();
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resp.clear();
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resp.push_back(RangeSize(base_addr, pmem_size));
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}
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int
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PhysicalMemory::MemoryPort::deviceBlockSize()
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{
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return memory->deviceBlockSize();
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}
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bool
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PhysicalMemory::MemoryPort::recvTiming(Packet *pkt)
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{
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return memory->doTimingAccess(pkt, this);
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}
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Tick
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PhysicalMemory::MemoryPort::recvAtomic(Packet *pkt)
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{
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return memory->doAtomicAccess(pkt);
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}
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void
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PhysicalMemory::MemoryPort::recvFunctional(Packet *pkt)
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{
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memory->doFunctionalAccess(pkt);
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}
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void
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PhysicalMemory::serialize(ostream &os)
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{
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gzFile compressedMem;
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string filename = name() + ".physmem";
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SERIALIZE_SCALAR(pmem_size);
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SERIALIZE_SCALAR(filename);
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// write memory file
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string thefile = Checkpoint::dir() + "/" + filename.c_str();
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int fd = creat(thefile.c_str(), 0664);
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if (fd < 0) {
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perror("creat");
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fatal("Can't open physical memory checkpoint file '%s'\n", filename);
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}
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compressedMem = gzdopen(fd, "wb");
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if (compressedMem == NULL)
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fatal("Insufficient memory to allocate compression state for %s\n",
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filename);
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if (gzwrite(compressedMem, pmem_addr, pmem_size) != pmem_size) {
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fatal("Write failed on physical memory checkpoint file '%s'\n",
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filename);
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}
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if (gzclose(compressedMem))
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fatal("Close failed on physical memory checkpoint file '%s'\n",
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filename);
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}
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void
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PhysicalMemory::unserialize(Checkpoint *cp, const string §ion)
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{
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gzFile compressedMem;
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long *tempPage;
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long *pmem_current;
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uint64_t curSize;
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uint32_t bytesRead;
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const int chunkSize = 16384;
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// unmap file that was mmaped in the constructor
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munmap(pmem_addr, pmem_size);
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string filename;
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UNSERIALIZE_SCALAR(pmem_size);
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UNSERIALIZE_SCALAR(filename);
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filename = cp->cptDir + "/" + filename;
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// mmap memoryfile
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int fd = open(filename.c_str(), O_RDONLY);
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if (fd < 0) {
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perror("open");
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fatal("Can't open physical memory checkpoint file '%s'", filename);
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}
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compressedMem = gzdopen(fd, "rb");
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if (compressedMem == NULL)
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fatal("Insufficient memory to allocate compression state for %s\n",
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filename);
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pmem_addr = (uint8_t *)mmap(NULL, pmem_size, PROT_READ | PROT_WRITE,
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MAP_ANON | MAP_PRIVATE, -1, 0);
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if (pmem_addr == (void *)MAP_FAILED) {
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perror("mmap");
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fatal("Could not mmap physical memory!\n");
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}
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curSize = 0;
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tempPage = (long*)malloc(chunkSize);
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if (tempPage == NULL)
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fatal("Unable to malloc memory to read file %s\n", filename);
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/* Only copy bytes that are non-zero, so we don't give the VM system hell */
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while (curSize < pmem_size) {
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bytesRead = gzread(compressedMem, tempPage, chunkSize);
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if (bytesRead != chunkSize && bytesRead != pmem_size - curSize)
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fatal("Read failed on physical memory checkpoint file '%s'"
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" got %d bytes, expected %d or %d bytes\n",
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filename, bytesRead, chunkSize, pmem_size-curSize);
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assert(bytesRead % sizeof(long) == 0);
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for (int x = 0; x < bytesRead/sizeof(long); x++)
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{
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if (*(tempPage+x) != 0) {
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pmem_current = (long*)(pmem_addr + curSize + x * sizeof(long));
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*pmem_current = *(tempPage+x);
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}
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}
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curSize += bytesRead;
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}
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free(tempPage);
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if (gzclose(compressedMem))
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fatal("Close failed on physical memory checkpoint file '%s'\n",
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filename);
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}
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
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Param<string> file;
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Param<Range<Addr> > range;
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Param<Tick> latency;
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END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
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BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
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INIT_PARAM_DFLT(file, "memory mapped file", ""),
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INIT_PARAM(range, "Device Address Range"),
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INIT_PARAM(latency, "Memory access latency")
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END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
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CREATE_SIM_OBJECT(PhysicalMemory)
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{
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return new PhysicalMemory(getInstanceName(), latency);
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}
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REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
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