306dea1eb8
This was added for backwards compatability, but it adds a decent amount of complexity. The table below shows what CPU class name to use in place of a given alias. +==========+========================================================+ | Alias | CPU class | +==========+========================================================+ | timing | TimingSimpleCPU | | atomic | AtomicSimpleCPU | | minor | MinorCPU | | detailed | DrivO3CPU | | kvm | ArmKvmCPU, ArmV8KvmCPU or X86KvmCPU, depending on arch | | trace | TraceCPU | +==========+========================================================+ Change-Id: I251c4f64b7869c6b64dd25b36967ae240f01ef08 Reviewed-on: https://gem5-review.googlesource.com/2940 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
123 lines
5.1 KiB
Python
123 lines
5.1 KiB
Python
# Copyright (c) 2012 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Andreas Sandberg
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import m5.objects
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import inspect
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import sys
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from textwrap import TextWrapper
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# Dictionary of mapping names of real CPU models to classes.
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_cpu_classes = {}
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def is_cpu_class(cls):
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"""Determine if a class is a CPU that can be instantiated"""
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# We can't use the normal inspect.isclass because the ParamFactory
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# and ProxyFactory classes have a tendency to confuse it.
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try:
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return issubclass(cls, m5.objects.BaseCPU) and \
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not cls.abstract and \
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not issubclass(cls, m5.objects.CheckerCPU)
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except (TypeError, AttributeError):
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return False
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def get(name):
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"""Get a CPU class from a user provided class name or alias."""
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try:
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cpu_class = _cpu_classes[name]
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return cpu_class
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except KeyError:
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print "%s is not a valid CPU model." % (name,)
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sys.exit(1)
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def print_cpu_list():
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"""Print a list of available CPU classes including their aliases."""
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print "Available CPU classes:"
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doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
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for name, cls in _cpu_classes.items():
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print "\t%s" % name
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# Try to extract the class documentation from the class help
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# string.
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doc = inspect.getdoc(cls)
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if doc:
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for line in doc_wrapper.wrap(doc):
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print line
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def cpu_names():
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"""Return a list of valid CPU names."""
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return _cpu_classes.keys()
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def config_etrace(cpu_cls, cpu_list, options):
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if issubclass(cpu_cls, m5.objects.DerivO3CPU):
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# Assign the same file name to all cpus for now. This must be
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# revisited when creating elastic traces for multi processor systems.
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for cpu in cpu_list:
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# Attach the elastic trace probe listener. Set the protobuf trace
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# file names. Set the dependency window size equal to the cpu it
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# is attached to.
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cpu.traceListener = m5.objects.ElasticTrace(
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instFetchTraceFile = options.inst_trace_file,
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dataDepTraceFile = options.data_trace_file,
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depWindowSize = 3 * cpu.numROBEntries)
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# Make the number of entries in the ROB, LQ and SQ very
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# large so that there are no stalls due to resource
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# limitation as such stalls will get captured in the trace
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# as compute delay. For replay, ROB, LQ and SQ sizes are
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# modelled in the Trace CPU.
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cpu.numROBEntries = 512;
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cpu.LQEntries = 128;
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cpu.SQEntries = 128;
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else:
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fatal("%s does not support data dependency tracing. Use a CPU model of"
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" type or inherited from DerivO3CPU.", cpu_cls)
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# The ARM detailed CPU is special in the sense that it doesn't exist
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# in the normal object hierarchy, so we have to add it manually.
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try:
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from O3_ARM_v7a import O3_ARM_v7a_3
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_cpu_classes["O3_ARM_v7a_3"] = O3_ARM_v7a_3
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except:
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pass
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# Add all CPUs in the object hierarchy.
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for name, cls in inspect.getmembers(m5.objects, is_cpu_class):
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_cpu_classes[name] = cls
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