Giacomo Travaglini 2f9cc04a5f arch-arm: SVE instruction in EL1s cannot be trapped to EL2 ...

haveVirtualization() is not a valid check on its own:
We need to check if EL2 trapping is currently supported and this
can only happen if we are in NS state or if SecEL2 is implemented

Change-Id: Ie2312caba1ac0f186a2a3305c55a23c7705ba3fd
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28769
Tested-by: kokoro <noreply+kokoro@google.com>

2020-05-09 21:35:44 +00:00

..

arm

arch-arm: SVE instruction in EL1s cannot be trapped to EL2

2020-05-09 21:35:44 +00:00

gcn3

arch-gcn3: Add files for arch gcn3 (GPU machine ISA)

2020-04-30 15:54:38 +00:00

generic

arch: Fix VecReg container alignement to 128bits view

2020-04-23 11:07:49 +00:00

hsail

arch,cpu,gpu-compute,mem: Remove asid from Request objects.

2020-03-07 00:40:41 +00:00

mips

base,arch,sim,cpu: Move object file loader components into a namespace.

2020-04-22 06:08:54 +00:00

null

arch: Delete authors lists from the null arch files.

2020-02-18 03:35:12 +00:00

power

base,arch,sim,cpu: Move object file loader components into a namespace.

2020-04-22 06:08:54 +00:00

riscv

arch-riscv: be prepared for CSR changes during PT walk.

2020-05-02 05:04:50 +00:00

sparc

base,arch,sim,cpu: Move object file loader components into a namespace.

2020-04-22 06:08:54 +00:00

x86

arch-x86: Add hsub instructions to x86

2020-04-23 08:20:12 +00:00

isa_parser.py

arch: list.sort() sorting by key only in python3

2020-03-13 14:24:07 +00:00

micro_asm_test.py

arch: Delete authors lists from generic arch files.

2020-02-18 03:34:56 +00:00

micro_asm.py

misc: Make exception handling python3 compliant

2020-03-13 14:24:07 +00:00

SConscript

arch: Eliminate vtophys and its switching header file.

2020-03-19 01:38:01 +00:00