91a84c5b3c
This patch eliminates the type Address defined by the ruby memory system. This memory system would now use the type Addr that is in use by the rest of the system.
73 lines
2.9 KiB
Plaintext
73 lines
2.9 KiB
Plaintext
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/*
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* Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* $Id$
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*
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*/
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// MemoryRequestType used in MemoryMsg
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enumeration(MemoryRequestType, desc="...") {
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// Southbound request: from directory to memory cache
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// or directory to memory or memory cache to memory
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MEMORY_READ, desc="Read request to memory";
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MEMORY_WB, desc="Write back data to memory";
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// response from memory to directory
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// (These are currently unused!)
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MEMORY_DATA, desc="Data read from memory";
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MEMORY_ACK, desc="Write to memory acknowledgement";
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}
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// Message to and from Memory Control
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structure(MemoryMsg, desc="...", interface="Message") {
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Addr addr, desc="Physical address for this request";
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MemoryRequestType Type, desc="Type of memory request (MEMORY_READ or MEMORY_WB)";
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MachineID Sender, desc="What component sent the data";
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MachineID OriginalRequestorMachId, desc="What component originally requested";
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DataBlock DataBlk, desc="Data to writeback";
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MessageSizeType MessageSize, desc="size category of the message";
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// Not all fields used by all protocols:
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PrefetchBit Prefetch, desc="Is this a prefetch request";
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bool ReadX, desc="Exclusive";
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int Acks, desc="How many acks to expect";
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bool functionalRead(Packet *pkt) {
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return testAndRead(addr, DataBlk, pkt);
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}
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bool functionalWrite(Packet *pkt) {
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return testAndWrite(addr, DataBlk, pkt);
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}
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}
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