These make it clear that a port represents a TLM socket, what direction it faces, and what its width is. Change-Id: Idcbea2b9b053f1e0685e011bc2c7de2468fb25b2 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18172 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
68 lines
2.7 KiB
Python
68 lines
2.7 KiB
Python
# Copyright 2019 Google, Inc.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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from m5.params import Port, VectorPort
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def TLM_TARGET_ROLE(width):
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return 'TLM TARGET %d' % width
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def TLM_INITIATOR_ROLE(width):
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return 'TLM INITIATOR %d' % width
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class TlmTargetSocket(Port):
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def __init__(self, width, desc):
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my_role = TLM_TARGET_ROLE(width)
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peer_role = TLM_INITIATOR_ROLE(width)
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Port.compat(my_role, peer_role)
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super(TlmTargetSocket, self).__init__(my_role, desc)
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class VectorTlmTargetSocket(VectorPort):
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def __init__(self, width, desc):
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my_role = TLM_TARGET_ROLE(width)
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peer_role = TLM_INITIATOR_ROLE(width)
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Port.compat(my_role, peer_role)
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super(VectorTlmTargetSocket, self).__init__(my_role, desc)
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class TlmInitiatorSocket(Port):
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def __init__(self, width, desc):
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my_role = TLM_INITIATOR_ROLE(width)
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peer_role = TLM_TARGET_ROLE(width)
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Port.compat(my_role, peer_role)
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super(TlmInitiatorSocket, self).__init__(my_role, desc, is_source=True)
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class VectorTlmInitiatorSocket(VectorPort):
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def __init__(self, width, desc):
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my_role = TLM_INITIATOR_ROLE(width)
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peer_role = TLM_TARGET_ROLE(width)
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Port.compat(my_role, peer_role)
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super(VectorTlmInitiatorSocket, self).__init__(
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my_role, desc, is_source=True)
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