2805f3dee1
Change-Id: Ic9ea62ae9c59fd838175fd6af4c075101d46a0b1 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52067 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Gabe Black <gabe.black@gmail.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
136 lines
4.4 KiB
C++
136 lines
4.4 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CPU_PRED_BTB_HH__
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#define __CPU_PRED_BTB_HH__
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#include "arch/generic/pcstate.hh"
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#include "base/logging.hh"
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#include "base/types.hh"
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#include "config/the_isa.hh"
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namespace gem5
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{
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namespace branch_prediction
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{
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class DefaultBTB
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{
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private:
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struct BTBEntry
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{
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/** The entry's tag. */
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Addr tag = 0;
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/** The entry's target. */
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std::unique_ptr<PCStateBase> target;
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/** The entry's thread id. */
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ThreadID tid;
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/** Whether or not the entry is valid. */
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bool valid = false;
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};
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public:
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/** Creates a BTB with the given number of entries, number of bits per
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* tag, and instruction offset amount.
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* @param numEntries Number of entries for the BTB.
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* @param tagBits Number of bits for each tag in the BTB.
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* @param instShiftAmt Offset amount for instructions to ignore alignment.
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*/
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DefaultBTB(unsigned numEntries, unsigned tagBits,
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unsigned instShiftAmt, unsigned numThreads);
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void reset();
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/** Looks up an address in the BTB. Must call valid() first on the address.
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* @param inst_PC The address of the branch to look up.
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* @param tid The thread id.
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* @return Returns the target of the branch.
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*/
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const PCStateBase *lookup(Addr instPC, ThreadID tid);
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/** Checks if a branch is in the BTB.
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* @param inst_PC The address of the branch to look up.
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* @param tid The thread id.
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* @return Whether or not the branch exists in the BTB.
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*/
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bool valid(Addr instPC, ThreadID tid);
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/** Updates the BTB with the target of a branch.
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* @param inst_pc The address of the branch being updated.
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* @param target_pc The target address of the branch.
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* @param tid The thread id.
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*/
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void update(Addr inst_pc, const PCStateBase &target_pc, ThreadID tid);
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private:
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/** Returns the index into the BTB, based on the branch's PC.
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* @param inst_PC The branch to look up.
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* @return Returns the index into the BTB.
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*/
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inline unsigned getIndex(Addr instPC, ThreadID tid);
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/** Returns the tag bits of a given address.
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* @param inst_PC The branch's address.
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* @return Returns the tag bits.
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*/
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inline Addr getTag(Addr instPC);
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/** The actual BTB. */
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std::vector<BTBEntry> btb;
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/** The number of entries in the BTB. */
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unsigned numEntries;
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/** The index mask. */
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unsigned idxMask;
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/** The number of tag bits per entry. */
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unsigned tagBits;
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/** The tag mask. */
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unsigned tagMask;
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/** Number of bits to shift PC when calculating index. */
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unsigned instShiftAmt;
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/** Number of bits to shift PC when calculating tag. */
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unsigned tagShiftAmt;
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/** Log2 NumThreads used for hashing threadid */
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unsigned log2NumThreads;
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};
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} // namespace branch_prediction
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} // namespace gem5
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#endif // __CPU_PRED_BTB_HH__
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