24da30e317
This basically means changing all #include statements and changing autogenerated code so that it generates the correct paths. Because slicc generates #includes, I had to hard code the include paths to mem/protocol.
96 lines
3.5 KiB
C++
96 lines
3.5 KiB
C++
/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* InputUnit_d.C
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*
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* Niket Agarwal, Princeton University
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*
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* */
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#include "mem/ruby/network/garnet-fixed-pipeline/InputUnit_d.hh"
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#include "mem/ruby/network/garnet-fixed-pipeline/Router_d.hh"
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InputUnit_d::InputUnit_d(int id, Router_d *router)
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{
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m_id = id;
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m_router = router;
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m_num_vcs = m_router->get_num_vcs();
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m_num_buffer_reads = 0;
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m_num_buffer_writes = 0;
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creditQueue = new flitBuffer_d();
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// Instantiating the virtual channels
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m_vcs.setSize(m_num_vcs);
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for(int i=0; i < m_num_vcs; i++)
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{
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m_vcs[i] = new VirtualChannel_d(i);
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}
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}
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InputUnit_d::~InputUnit_d()
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{
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delete creditQueue;
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m_vcs.deletePointers();
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}
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void InputUnit_d::wakeup()
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{
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flit_d *t_flit;
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if(m_in_link->isReady())
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{
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t_flit = m_in_link->consumeLink();
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int vc = t_flit->get_vc();
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if((t_flit->get_type() == HEAD_) || (t_flit->get_type() == HEAD_TAIL_))
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{
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assert(m_vcs[vc]->get_state() == IDLE_);
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m_router->route_req(t_flit, this, vc); // Do the route computation for this vc
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m_vcs[vc]->set_enqueue_time(g_eventQueue_ptr->getTime());
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}
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else
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{
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t_flit->advance_stage(SA_);
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m_router->swarb_req();
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}
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m_vcs[vc]->insertFlit(t_flit); // write flit into input buffer
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m_num_buffer_writes++;
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m_num_buffer_reads++; // same as read because any flit that is written will be read only once
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}
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}
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void InputUnit_d::printConfig(ostream& out)
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{
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out << endl;
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out << "InputUnit Configuration" << endl;
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out << "---------------------" << endl;
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out << "id = " << m_id << endl;
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out << "In link is " << m_in_link->get_id() << endl;
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}
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