Gabe Black 1d741c48af Merge m5.eecs.umich.edu:/bk/newmem ...

into  ewok.(none):/home/gblack/m5/newmem

arch/sparc/isa/decoder.isa:
    SCCS merged

--HG--
extra : convert_revision : 460843b49bc96b3fbc5897828c23f9cf9b010ae0

2006-03-16 14:08:31 -05:00

..

alpha

Merge m5.eecs.umich.edu:/bk/newmem

2006-03-16 14:08:31 -05:00

mips

add translations for new sections that are mmapped or when the brk

2006-03-15 17:04:50 -05:00

sparc

Merge m5.eecs.umich.edu:/bk/newmem

2006-03-16 14:08:31 -05:00

isa_parser.py

Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.

2006-03-14 15:55:00 -05:00

isa_specific.hh

Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu

2006-03-14 18:28:51 -05:00

SConscript

Moved registerfile.hh to regfile.hh

2006-03-14 16:05:44 -05:00