1a00ecfaf9
This allows for multiple gem5 simulations to be spawned from a single
parent gem5 process, as defined in a simgle gem5 configuration. In this
design _all_ the `Simulator`s are defined in the simulation script and
then added to the mutlisim module. For example:
```py
from gem5.simulate.Simulator import Simulator
import gem5.utils.multisim as multisim
# Construct the board[0] and board[1] as you wish here...
simulator1 = Simulator(board=board[0], id="board-1")
simulator2 = Simulator(board=board[1], id="board-2")
multisim.add_simulator(simulator1)
multisim.add_simulator(simulator2)
```
This specifies that two simulations are to be run in parallel in
seperate threads: one specified by `simulator1` and another by
`simulator2`. They are then added to MultiSim via the
`multisim.add_simulator` function. The user can specify an id via the
Simulator constructor. This is used to give each process a unique id and
output directory name. Given this, the id should be a helpful name
describing the simulation being specified. If not specified one is
automatically given.
To run these simulators we use `<gem5 binary> -m gem5.utils.multisim
<script> -p <num_processes>`. Note: multisim is an executable module in
gem5. This is the same module we input into our scripts to add the
simulators. This is an intentionally modular encapsulated design. When
the module processes a script it will schedule multiple gem5 jobs and,
dependent on the number of processes specified, will create child gem5
processes to processes tjese jobs (jobs are just gem5 simulations in
this case). The `--processes` (`-p`) argument is optional and if not
specified the max number of processes which can be run concurrently will
be the number of available threads on the host system.
The id for each process is used to create a subdirectory inside the
`outputdor` (`m5out`) of that id name. E.g, in the example above the
ID's are `board-1` and `board-2`. Therefore the m5 out directory will
look as follows:
```sh
- m5out
- board-1
- stats.txt
- config.ini
- config.json
- terminal.out
- board-2
- stats.txt
- config.ini
- config.json
- terminal.out
```
Each simulations output is encapsulated inside the subdirectory of the
id name.
If the multisim configuation script is passed directly to gem5 (like a
traditional gem5 configuraiton script, i.e.: `<gem5 binary> <script>`),
the user may run a single simulation specified in that script by passing
its id as an argument. E.g. `<gem5 binary> <script> board-1` will run
the `board-1` simulation specified in `script`. If no argument is passed
an Exception is raised asking the user to either specify or use the
MultiSim module if multiprocessing is needed.
If the user desires a list of ids of the simulations specified in a
given MultiSim script, they can do so by passing the `--list` (`-l`)
parameter to the config script. I.e., `<gem5 binary> <script> --list`
will list all the IDs for all the simulations specified in`script`.
This change comes with two new example scripts found in
'configs/example/gem5_library/multsim" to demonstrate multisim in both
an SE and FS mode simulation. Tests have been added which run these
scripts as part of gem5' Daily suite of tests.
Notes
=====
* **Bug fixed**: The `NoCache` classic cache hierarchy has been modified
so the Xbar is no longet set with a `__func__` call. This interfered
with MultiProcessing as this structure is not serializable via Pickle.
This was quite bad design anyway so should be changed
* **Change**: `readfile_contents` parameter previously wrote its value
to a file called "readfile" in the output dorectory. This has been
changed to write to a file called "readfile_{hash}" with "{hash}" being
a hash of the `readfile_contents`. This ensures that, during multisim
running, this file is not overwritten by other processes.
* **Removal note**: This implementation supercedes the functionality
outlined in 'src/python/gem5/utils/multiprocessing'. As such, this code
has been removed.
Limitations/Things to Fix/Improve
=================================
* Though each Simulator process has its own output directory (a
subdirectory within m5out, with an ID set by the user unique to that
Simulator), the stdout and stderr are still output to the terminal, not
the output directory. This results in: 1. stdout and stderr data lost
and not recorded for these runs. 2. An incredibly noisy terminal output.
* Each process uses the same cached resources. While there are locks on
resources when downloading, each processes will hash the resources they
require to ensure they are valid. This is very inefficient in cases
where resources are common between processes (e.g., you may have 10
processes each using the same disk image with each processes hashing the
disk images independently to give the same result to validate the
resources).
Change-Id: Ief5a3b765070c622d1f0de53ebd545c85a3f0eee
---------
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Co-authored-by: Jason Lowe-Power <jason@lowepower.com>
122 lines
4.5 KiB
Python
122 lines
4.5 KiB
Python
# Copyright (c) 2022 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This gem5 configuation script creates a simple board to run the first
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10^6 ticks of "riscv-hello" binary simulation and saves a checkpoint.
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This configuration serves as an example of taking a checkpoint.
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This is setup is the close to the simplest setup possible using the gem5
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library. It does not contain any kind of caching, IO, or any non-essential
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components.
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Usage
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-----
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```
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scons build/RISCV/gem5.opt
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./build/RISCV/gem5.opt \
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configs/example/gem5_library/checkpoint/riscv-hello-save-checkpoint.py
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```
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"""
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import argparse
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from gem5.components.boards.simple_board import SimpleBoard
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from gem5.components.cachehierarchies.classic.no_cache import NoCache
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from gem5.components.memory import SingleChannelDDR3_1600
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from gem5.components.processors.cpu_types import CPUTypes
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from gem5.components.processors.simple_processor import SimpleProcessor
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from gem5.isas import ISA
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from gem5.resources.resource import obtain_resource
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from gem5.simulate.simulator import Simulator
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from gem5.utils.requires import requires
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parser = argparse.ArgumentParser()
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parser.add_argument(
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"--checkpoint-path",
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type=str,
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required=False,
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default="riscv-hello-checkpoint/",
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help="The directory to store the checkpoint.",
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)
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args = parser.parse_args()
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# This check ensures the gem5 binary is compiled to the RISCV ISA target.
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# If not, an exception will be thrown.
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requires(isa_required=ISA.RISCV)
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# In this setup we don't have a cache. `NoCache` can be used for such setups.
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cache_hierarchy = NoCache()
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# We use a single channel DDR3_1600 memory system
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memory = SingleChannelDDR3_1600(size="32MB")
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# We use a simple Timing processor with one core.
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processor = SimpleProcessor(
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cpu_type=CPUTypes.TIMING, isa=ISA.RISCV, num_cores=1
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)
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# The gem5 library simble board which can be used to run simple SE-mode
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# simulations.
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board = SimpleBoard(
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clk_freq="3GHz",
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processor=processor,
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memory=memory,
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cache_hierarchy=cache_hierarchy,
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)
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# Here we set the workload. In this case we want to run a simple "Hello World!"
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# program compiled to the RISCV ISA. The `Resource` class will automatically
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# download the binary from the gem5 Resources cloud bucket if it's not already
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# present.
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board.set_se_binary_workload(
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# The `Resource` class reads the `resources.json` file from the gem5
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# resources repository:
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# https://github.com/gem5/gem5-resources.
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# Any resource specified in this file will be automatically retrieved.
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# At the time of writing, this file is a WIP and does not contain all
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# resources. Jira ticket: https://gem5.atlassian.net/browse/GEM5-1096
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obtain_resource("riscv-hello")
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)
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# Lastly we run the simulation.
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max_ticks = 10**6
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simulator = Simulator(board=board, full_system=False, max_ticks=max_ticks)
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simulator.run()
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print(
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"Exiting @ tick {} because {}.".format(
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simulator.get_current_tick(), simulator.get_last_exit_event_cause()
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)
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)
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print("Taking a checkpoint at", args.checkpoint_path)
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simulator.save_checkpoint(args.checkpoint_path)
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print("Done taking a checkpoint")
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