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17b0e9714d4bde7462d4663899bb9498027f6b40
gem5/src/dev
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Ali Saidi 17b0e9714d add boiler plate intel nic code 
src/SConscript:
    add intel nic to sconscript
src/dev/pcidev.cc:
    fix bug with subsystemid value
src/python/m5/objects/Ethernet.py:
    add intel nic to ethernet.py
src/python/m5/objects/Ide.py:
src/python/m5/objects/Pci.py:
    Move config_latency into pci where it belogs

--HG--
extra : convert_revision : 7163aaf7b4098496518b0910cef62f2ce3dd574d
2006-09-18 20:12:45 -04:00
..
alpha_access.h
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
alpha_console.cc
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
2006-06-06 17:32:21 -04:00
alpha_console.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
baddev.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
baddev.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
disk_image.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
disk_image.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherbus.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherbus.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherdump.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherdump.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherint.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherint.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherlink.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherlink.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherpkt.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
etherpkt.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
ethertap.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
ethertap.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
i8254xGBe_defs.hh
add boiler plate intel nic code
2006-09-18 20:12:45 -04:00
i8254xGBe.cc
add boiler plate intel nic code
2006-09-18 20:12:45 -04:00
i8254xGBe.hh
add boiler plate intel nic code
2006-09-18 20:12:45 -04:00
ide_atareg.h
New directory structure:
2006-05-22 14:29:33 -04:00
ide_ctrl.cc
Need config read/write latency.
2006-07-27 16:43:02 -04:00
ide_ctrl.hh
Add default responder to bus
2006-07-06 14:41:01 -04:00
ide_disk.cc
fixes for gcc 4.1
2006-08-15 17:41:22 -04:00
ide_disk.hh
Minor include file & formatting cleanup.
2006-08-30 09:57:46 -07:00
ide_wdcreg.h
New directory structure:
2006-05-22 14:29:33 -04:00
io_device.cc
Move more common functionality into SimpleTimingPort,
2006-08-30 16:24:26 -07:00
io_device.hh
Move more common functionality into SimpleTimingPort,
2006-08-30 16:24:26 -07:00
isa_fake.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
isa_fake.hh
Fix up doxygen.
2006-08-14 19:25:07 -04:00
ns_gige_reg.h
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
ns_gige.cc
Need config read/write latency.
2006-07-27 16:43:02 -04:00
ns_gige.hh
memory mode information now contained in system object
2006-07-12 20:22:07 -04:00
pciconfigall.cc
Add default responder to bus
2006-07-06 14:41:01 -04:00
pciconfigall.hh
Add default responder to bus
2006-07-06 14:41:01 -04:00
pcidev.cc
add boiler plate intel nic code
2006-09-18 20:12:45 -04:00
pcidev.hh
Move more common functionality into SimpleTimingPort,
2006-08-30 16:24:26 -07:00
pcireg.h
Get rid of unneeded union.
2006-08-28 11:01:25 -07:00
pitreg.h
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
pktfifo.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
pktfifo.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
platform.cc
Fixed ALPHA_FS by moving the remnants of isa_fullsys_traits.hh into arch/alpha/pagetable.hh and fixing up some includes
2006-08-15 04:46:51 -04:00
platform.hh
Add default responder to bus
2006-07-06 14:41:01 -04:00
rtcreg.h
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
simconsole.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
simconsole.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
simple_disk.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
simple_disk.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
sinic.cc
fixes for gcc 4.1
2006-08-15 17:41:22 -04:00
sinic.hh
memory mode information now contained in system object
2006-07-12 20:22:07 -04:00
sinicreg.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
tsunami_cchip.cc
Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
2006-06-06 17:32:21 -04:00
tsunami_cchip.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
tsunami_io.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
tsunami_io.hh
Fix up doxygen.
2006-08-14 19:25:07 -04:00
tsunami_pchip.cc
Add default responder to bus
2006-07-06 14:41:01 -04:00
tsunami_pchip.hh
Two minor FS compile fixes.
2006-07-06 16:26:44 -04:00
tsunami.cc
Add default responder to bus
2006-07-06 14:41:01 -04:00
tsunami.hh
Fix up doxygen.
2006-08-14 19:25:07 -04:00
tsunamireg.h
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
uart8250.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
uart8250.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
uart.cc
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
uart.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00