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167fb86a694dbb49fe51cccbb4285bddcbf2cd44
gem5/src/cpu/simple
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Korey Sewell 6a0c5b9fad Edit Fetch DPRINT in simple CPU
src/arch/mips/isa/formats/mt.isa:
    change copyright to 2006
src/cpu/simple/base.cc:
    Only DPRINT NNPC if we are not using ALPHA
src/cpu/static_inst.hh:
    Take Out MIPS Specific functions ...

--HG--
extra : convert_revision : 7a69e80cd1564fa3b778b9dade0e9fe3cef94e64
2006-06-11 14:38:14 -04:00
..
atomic.cc
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in order to clear up the confusion due to the many ExecContexts. It also derives from a common ThreadState object, which holds various state common to threads across CPU models.
2006-06-07 15:29:53 -04:00
atomic.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
base.cc
Edit Fetch DPRINT in simple CPU
2006-06-11 14:38:14 -04:00
base.hh
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in order to clear up the confusion due to the many ExecContexts. It also derives from a common ThreadState object, which holds various state common to threads across CPU models.
2006-06-07 15:29:53 -04:00
timing.cc
Reorganization/renaming of CPUExecContext. Now it is called SimpleThread in order to clear up the confusion due to the many ExecContexts. It also derives from a common ThreadState object, which holds various state common to threads across CPU models.
2006-06-07 15:29:53 -04:00
timing.hh
Updated Authors from bk prs info
2006-05-31 19:26:56 -04:00
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