Michael LeBeane 6747b127af arch-gcn3: Fix VOP2 dissasembly prints ...

VOP2 prints VSRC1 register index as hex instead of decimal if the
instruction contains a literal operand.  This patch resets the
format specifiers in the stream to print the register correctly.

Change-Id: Icc7e6588b3c5af545be6590ce412460e72df253f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29936
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>

2020-07-13 19:48:12 +00:00

..

arch

arch-gcn3: Fix VOP2 dissasembly prints

2020-07-13 19:48:12 +00:00

base

arch-gcn3: fix bits that SDWA selects

2020-07-13 16:19:47 +00:00

cpu

arch,cpu: Consolidate most of the StackTrace classes into a base class.

2020-07-11 00:24:38 +00:00

dev

dev-arm: Style fixes for src/dev/arm/gic_v2.hh

2020-07-11 07:50:24 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

misc,sim: Tagged API methods in sim/simobject.hh

2020-05-19 21:58:24 +00:00

gpu-compute

arch-gcn3, gpu-compute: Implement out-of-range accesses

2020-07-13 19:48:00 +00:00

kern

arch,cpu,sim: Eliminate the now empty kernel statistics classes.

2020-06-17 19:54:41 +00:00

learning_gem5

misc: Make many includes explicit.

2020-06-03 19:42:46 +00:00

mem

mem: Optionally share the backing store

2020-07-08 17:42:25 +00:00

proto

misc: Use the protobuf version to choose between ByteSize(Long).

2020-04-29 21:46:11 +00:00

python

stats: add --stats-root option to dump only under some SimObjects

2020-07-01 13:22:52 +00:00

sim

mem: Optionally share the backing store

2020-07-08 17:42:25 +00:00

systemc

systemc: Replace include of eventq_impl.hh with eventq.hh.

2020-06-04 17:59:31 +00:00

unittest

arch,base,cpu,kerm,sim: Build a symbol table for object files.

2020-06-09 23:37:29 +00:00

Doxyfile

misc: Reverting version numbers

2020-07-03 20:59:44 -07:00

SConscript

scons: Add MARSHAL_XXFLAGS_EXTRA for the marshal object

2020-06-22 09:08:42 +00:00