Vincentius Robby 13d10e844c alpha: Make the TLB cache to actually work. ...

Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006

2007-08-08 14:18:09 -04:00

..

alpha

alpha: Make the TLB cache to actually work.

2007-08-08 14:18:09 -04:00

mips

merge: mips fix to getArgument

2007-08-01 16:58:22 -07:00

sparc

Merge with head.

2007-08-01 15:12:07 -07:00

x86

X86: Added some missing parenthesis in the condition code calculation function.

2007-08-07 15:26:50 -07:00

isa_parser.py

X86: Make a microcode branch microop.

2007-08-07 15:19:26 -07:00

isa_specific.hh

Add build hooks for x86.

2007-03-03 16:01:48 +00:00

micro_asm_test.py

Add a second section to make sure the ROM is extended properly.

2007-05-31 22:21:21 +00:00

micro_asm.py

Fix a problem where part of a microops parameters might be interpretted as an "ID", and also added support for symbols.

2007-06-21 15:26:01 +00:00

SConscript

style: Check/Fix whitespace on SCons files

2007-07-28 16:49:20 -07:00