1246617fb2
Several files in the repository were tracked with execute permissions even though the files are just normal C/C++ files (and the one .isa). Change-Id: I976b096acab4a1fc74c5699ef1f9b222c1e635c2 Reviewed-on: https://gem5-review.googlesource.com/7241 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
141 lines
4.0 KiB
C++
141 lines
4.0 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Rick Strong
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*/
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/** @file
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* Emulation of the Malta CChip CSRs
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*/
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#ifndef __MALTA_CCHIP_HH__
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#define __MALTA_CCHIP_HH__
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#include "dev/mips/malta.hh"
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#include "dev/io_device.hh"
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#include "params/MaltaCChip.hh"
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/**
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* Malta CChip CSR Emulation. This device includes all the interrupt
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* handling code for the chipset.
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*/
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class MaltaCChip : public BasicPioDevice
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{
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protected:
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/**
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* pointer to the malta object.
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* This is our access to all the other malta
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* devices.
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*/
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Malta *malta;
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/**
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* The dims are device interrupt mask registers.
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* One exists for each CPU, the DRIR X DIM = DIR
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*/
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//uint64_t dim[Malta::Max_CPUs];
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/**
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* The dirs are device interrupt registers.
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* One exists for each CPU, the DRIR X DIM = DIR
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*/
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//uint64_t dir[Malta::Max_CPUs];
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/**
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* This register contains bits for each PCI interrupt
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* that can occur.
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*/
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//uint64_t drir;
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/** Indicator of which CPUs have an IPI interrupt */
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//uint64_t ipint;
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/** Indicator of which CPUs have an RTC interrupt */
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//uint64_t itint;
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public:
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typedef MaltaCChipParams Params;
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const Params *
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params() const
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{
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return dynamic_cast<const Params *>(_params);
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}
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/**
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* Initialize the Malta CChip by setting all of the
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* device register to 0.
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* @param p params struct
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*/
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MaltaCChip(Params *p);
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Tick read(PacketPtr pkt) override;
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Tick write(PacketPtr pkt) override;
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/**
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* post an RTC interrupt to the CPU
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*/
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void postRTC();
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/**
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* post an interrupt to the CPU.
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* @param interrupt the interrupt number to post (0-7)
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*/
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void postIntr(uint32_t interrupt);
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/**
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* clear an interrupt previously posted to the CPU.
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* @param interrupt the interrupt number to post (0-7)
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*/
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void clearIntr(uint32_t interrupt);
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/**
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* post an ipi interrupt to the CPU.
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* @param ipintr the cpu number to clear(bitvector)
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*/
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void clearIPI(uint64_t ipintr);
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/**
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* clear a timer interrupt previously posted to the CPU.
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* @param itintr the cpu number to clear(bitvector)
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*/
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void clearITI(uint64_t itintr);
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/**
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* request an interrupt be posted to the CPU.
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* @param ipreq the cpu number to interrupt(bitvector)
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*/
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void reqIPI(uint64_t ipreq);
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void serialize(CheckpointOut &cp) const override;
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void unserialize(CheckpointIn &cp) override;
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};
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#endif // __MALTA_CCHIP_HH__
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