d9c870f641
This patch reworks the Linux Kernel panic and oops events. The code has been re-factored to provide re-usable events that can be applied to all ISAs from the base `KernelWorkload` `SimObject`. At the moment they are installed for the Arm workloads. This update also provides more configuration options that can be specified using the new `KernelPanicOopsBehaviour` enum. The options are applied to the Kernel Workload parameters `on_panic` and `on_oops` which are available to all subclasses of `KernelWorkload`. The main rationale for this reworking is to add the option to cleanly exit the simulation after dumping the Dmesg buffer. Without this option, the simulation would continue running after a Kernel panic. If system components (e.g. a system timer) keep the event queue alive, this causes the simulation to run slowly to the maximum allowed tick.
158 lines
5.9 KiB
Python
158 lines
5.9 KiB
Python
# -*- mode:python -*-
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# Copyright (c) 2023 Arm Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Copyright (c) 2006 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Import('*')
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SimObject('ClockedObject.py', sim_objects=['ClockedObject'])
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SimObject('TickedObject.py', sim_objects=['TickedObject'])
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SimObject('Workload.py', sim_objects=[
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'Workload', 'StubWorkload', 'KernelWorkload', 'SEWorkload'],
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enums=['KernelPanicOopsBehaviour'])
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SimObject('Root.py', sim_objects=['Root'])
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SimObject('ClockDomain.py', sim_objects=[
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'ClockDomain', 'SrcClockDomain', 'DerivedClockDomain'])
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SimObject('VoltageDomain.py', sim_objects=['VoltageDomain'])
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SimObject('System.py', sim_objects=['System'], enums=['MemoryMode'])
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SimObject('DVFSHandler.py', sim_objects=['DVFSHandler'])
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SimObject('SubSystem.py', sim_objects=['SubSystem'])
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SimObject('RedirectPath.py', sim_objects=['RedirectPath'])
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SimObject('PowerState.py', sim_objects=['PowerState'], enums=['PwrState'])
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SimObject('PowerDomain.py', sim_objects=['PowerDomain'])
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SimObject('SignalPort.py', sim_objects=[])
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Source('async.cc')
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Source('backtrace_%s.cc' % env['BACKTRACE_IMPL'], add_tags='gem5 trace')
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Source('bufval.cc')
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Source('core.cc')
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Source('cur_tick.cc', add_tags='gem5 trace')
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Source('tags.cc')
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Source('cxx_config.cc')
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Source('cxx_manager.cc')
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Source('cxx_config_ini.cc')
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Source('debug.cc')
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Source('drain.cc', add_tags='gem5 drain')
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Source('py_interact.cc', add_tags='python')
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Source('eventq.cc', add_tags='gem5 events')
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Source('futex_map.cc')
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Source('global_event.cc', add_tags='gem5 drain')
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Source('globals.cc')
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Source('init.cc', add_tags='python')
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Source('init_signals.cc')
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Source('main.cc', tags='main')
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Source('kernel_workload.cc')
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Source('port.cc')
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Source('python.cc', add_tags='python')
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Source('redirect_path.cc')
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Source('root.cc')
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Source('serialize.cc', add_tags='gem5 serialize')
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Source('se_workload.cc')
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Source('sim_events.cc', add_tags='gem5 drain')
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Source('sim_object.cc')
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Source('sub_system.cc')
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Source('ticked_object.cc')
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Source('simulate.cc')
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Source('stat_control.cc')
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Source('stat_register.cc', add_tags='python')
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Source('clock_domain.cc')
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Source('voltage_domain.cc')
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Source('se_signal.cc')
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Source('linear_solver.cc')
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Source('system.cc')
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Source('dvfs_handler.cc')
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Source('clocked_object.cc')
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Source('mathexpr.cc')
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Source('power_state.cc')
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Source('power_domain.cc')
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Source('stats.cc')
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Source('workload.cc')
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Source('mem_pool.cc')
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env.TagImplies('gem5 drain', ['gem5 events', 'gem5 trace'])
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env.TagImplies('gem5 events', ['gem5 serialize', 'gem5 trace'])
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env.TagImplies('gem5 serialize', 'gem5 trace')
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GTest('bufval.test', 'bufval.test.cc', 'bufval.cc')
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GTest('byteswap.test', 'byteswap.test.cc', '../base/types.cc')
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GTest('globals.test', 'globals.test.cc', 'globals.cc',
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with_tag('gem5 serialize'))
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GTest('guest_abi.test', 'guest_abi.test.cc')
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GTest('port.test', 'port.test.cc', 'port.cc')
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GTest('proxy_ptr.test', 'proxy_ptr.test.cc')
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GTest('serialize.test', 'serialize.test.cc', with_tag('gem5 serialize'))
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GTest('serialize_handlers.test', 'serialize_handlers.test.cc')
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SimObject('InstTracer.py', sim_objects=['InstTracer', 'InstDisassembler'])
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SimObject('Process.py', sim_objects=['Process', 'EmulatedDriver'])
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Source('faults.cc')
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Source('process.cc')
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Source('fd_array.cc')
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Source('fd_entry.cc')
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Source('mem_state.cc')
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Source('pseudo_inst.cc')
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Source('syscall_emul.cc')
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Source('syscall_desc.cc')
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Source('vma.cc')
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DebugFlag('Checkpoint')
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DebugFlag('Config')
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DebugFlag('CxxConfig')
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DebugFlag('Drain')
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DebugFlag('Event')
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DebugFlag('Flow')
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DebugFlag('IPI')
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DebugFlag('IPR')
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DebugFlag('Interrupt')
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DebugFlag('Loader')
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DebugFlag('PseudoInst')
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DebugFlag('Stack')
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DebugFlag('SyscallBase')
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DebugFlag('SyscallVerbose')
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DebugFlag('TimeSync')
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DebugFlag('Thread')
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DebugFlag('Timer')
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DebugFlag('VtoPhys')
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DebugFlag('WorkItems')
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DebugFlag('ClockDomain')
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DebugFlag('VoltageDomain')
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DebugFlag('DVFS')
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DebugFlag('Vma')
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DebugFlag('PowerDomain')
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CompoundFlag('SyscallAll', [ 'SyscallBase', 'SyscallVerbose'])
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