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0df85fd8d8b7a8c8d11b1b3da5b6277e4a5e54ec
gem5/arch
History
Gabe Black 0df85fd8d8 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : 5fe5a3d70774d6420b890237d9be4a5d0f00d17e
2006-03-08 08:09:45 -05:00
..
alpha
Working towards compiling SPARC_SE
2006-03-08 08:09:27 -05:00
mips
Update MiscReg enum and miscRegFile definition
2006-03-08 04:36:55 -05:00
sparc
Working towards compiling SPARC_SE
2006-03-08 08:09:27 -05:00
isa_parser.py
Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
2006-03-03 15:28:25 -05:00
isa_specific.hh
Auto-generate arch/foo.hh "switch headers" in scons.
2006-02-22 22:22:06 -05:00
SConscript
Pushed ev5.hh out of the non-alpha code.
2006-03-07 14:08:01 -05:00
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