Compiling gem5 with dramsim2 included fails due to some inconsistencies in including SimObjects. In this patch this issue is fixed along with temporarily disabling -Werror=nonnull-compare in CCFLAGS. Also, the remote for cloning dramsim2 has been changed. Change-Id: Ia24095150d026d736352aaf0d735b7554ede10bb Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31434 Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
55 lines
2.8 KiB
Python
55 lines
2.8 KiB
Python
# Copyright (c) 2013 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from m5.params import *
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from m5.objects.AbstractMemory import *
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# A wrapper for DRAMSim2 multi-channel memory controller
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class DRAMSim2(AbstractMemory):
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type = 'DRAMSim2'
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cxx_header = "mem/dramsim2.hh"
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# A single port for now
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port = SlavePort("Slave port")
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deviceConfigFile = Param.String("ini/DDR3_micron_32M_8B_x8_sg15.ini",
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"Device configuration file")
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systemConfigFile = Param.String("system.ini.example",
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"Memory organisation configuration file")
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filePath = Param.String("ext/dramsim2/DRAMSim2/",
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"Directory to prepend to file names")
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traceFile = Param.String("", "Output file for trace generation")
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enableDebug = Param.Bool(False, "Enable DRAMSim2 debug output")
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