349cad7703
Change-Id: I2610626a7e1464316ebaa770291d4bdcb59e8856 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31114 Reviewed-by: Ciro Santilli <ciro.santilli@arm.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
93 lines
3.7 KiB
XML
93 lines
3.7 KiB
XML
<?xml version="1.0"?>
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<!--
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GDB feature descriptor defining the structure of the G packet,
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i.e., the representation of register contents on the wire.
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This file does not model any real variant of PowerPC in particular
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(such as, RS/6000 or e500): it simply reflects BaseGdbRegCache's
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fields in power/remote_gdb.hh.
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As such, this description is something of an oversimplification
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relative to the XML files in the GDB source, in that it does not
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take into account possible variations in features resulting in
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non-sequential numbering of registers.
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-->
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<target>
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<architecture>powerpc</architecture>
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<feature name="org.gnu.gdb.power">
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<reg name="r0" bitsize="32"/>
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<reg name="r1" bitsize="32"/>
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<reg name="r2" bitsize="32"/>
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<reg name="r3" bitsize="32"/>
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<reg name="r4" bitsize="32"/>
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<reg name="r5" bitsize="32"/>
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<reg name="r6" bitsize="32"/>
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<reg name="r7" bitsize="32"/>
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<reg name="r8" bitsize="32"/>
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<reg name="r9" bitsize="32"/>
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<reg name="r10" bitsize="32"/>
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<reg name="r11" bitsize="32"/>
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<reg name="r12" bitsize="32"/>
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<reg name="r13" bitsize="32"/>
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<reg name="r14" bitsize="32"/>
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<reg name="r15" bitsize="32"/>
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<reg name="r16" bitsize="32"/>
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<reg name="r17" bitsize="32"/>
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<reg name="r18" bitsize="32"/>
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<reg name="r19" bitsize="32"/>
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<reg name="r20" bitsize="32"/>
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<reg name="r21" bitsize="32"/>
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<reg name="r22" bitsize="32"/>
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<reg name="r23" bitsize="32"/>
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<reg name="r24" bitsize="32"/>
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<reg name="r25" bitsize="32"/>
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<reg name="r26" bitsize="32"/>
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<reg name="r27" bitsize="32"/>
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<reg name="r28" bitsize="32"/>
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<reg name="r29" bitsize="32"/>
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<reg name="r30" bitsize="32"/>
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<reg name="r31" bitsize="32"/>
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<reg name="f0" bitsize="64" type="ieee_double" regnum="32"/>
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<reg name="f1" bitsize="64" type="ieee_double"/>
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<reg name="f2" bitsize="64" type="ieee_double"/>
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<reg name="f3" bitsize="64" type="ieee_double"/>
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<reg name="f4" bitsize="64" type="ieee_double"/>
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<reg name="f5" bitsize="64" type="ieee_double"/>
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<reg name="f6" bitsize="64" type="ieee_double"/>
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<reg name="f7" bitsize="64" type="ieee_double"/>
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<reg name="f8" bitsize="64" type="ieee_double"/>
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<reg name="f9" bitsize="64" type="ieee_double"/>
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<reg name="f10" bitsize="64" type="ieee_double"/>
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<reg name="f11" bitsize="64" type="ieee_double"/>
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<reg name="f12" bitsize="64" type="ieee_double"/>
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<reg name="f13" bitsize="64" type="ieee_double"/>
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<reg name="f14" bitsize="64" type="ieee_double"/>
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<reg name="f15" bitsize="64" type="ieee_double"/>
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<reg name="f16" bitsize="64" type="ieee_double"/>
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<reg name="f17" bitsize="64" type="ieee_double"/>
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<reg name="f18" bitsize="64" type="ieee_double"/>
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<reg name="f19" bitsize="64" type="ieee_double"/>
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<reg name="f20" bitsize="64" type="ieee_double"/>
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<reg name="f21" bitsize="64" type="ieee_double"/>
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<reg name="f22" bitsize="64" type="ieee_double"/>
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<reg name="f23" bitsize="64" type="ieee_double"/>
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<reg name="f24" bitsize="64" type="ieee_double"/>
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<reg name="f25" bitsize="64" type="ieee_double"/>
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<reg name="f26" bitsize="64" type="ieee_double"/>
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<reg name="f27" bitsize="64" type="ieee_double"/>
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<reg name="f28" bitsize="64" type="ieee_double"/>
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<reg name="f29" bitsize="64" type="ieee_double"/>
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<reg name="f30" bitsize="64" type="ieee_double"/>
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<reg name="f31" bitsize="64" type="ieee_double"/>
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<reg name="pc" bitsize="32" type="code_ptr" regnum="64"/>
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<reg name="msr" bitsize="32"/>
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<reg name="cr" bitsize="32"/>
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<reg name="lr" bitsize="32" type="code_ptr"/>
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<reg name="ctr" bitsize="32"/>
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<reg name="xer" bitsize="32"/>
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</feature>
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</target>
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