07cf9d914b
This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges.
313 lines
9.0 KiB
C++
313 lines
9.0 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Nathan Binkert
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*/
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#ifndef __DEV_IO_DEVICE_HH__
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#define __DEV_IO_DEVICE_HH__
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#include "base/fast_alloc.hh"
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#include "mem/mem_object.hh"
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#include "mem/packet.hh"
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#include "mem/tport.hh"
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#include "params/BasicPioDevice.hh"
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#include "params/DmaDevice.hh"
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#include "params/PioDevice.hh"
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#include "sim/sim_object.hh"
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class Event;
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class Platform;
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class PioDevice;
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class DmaDevice;
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class System;
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/**
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* The PioPort class is a programmed i/o port that all devices that are
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* sensitive to an address range use. The port takes all the memory
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* access types and roles them into one read() and write() call that the device
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* must respond to. The device must also provide getAddrRanges() function
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* with which it returns the address ranges it is interested in.
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*/
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class PioPort : public SimpleTimingPort
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{
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protected:
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/** The device that this port serves. */
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PioDevice *device;
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virtual Tick recvAtomic(PacketPtr pkt);
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virtual AddrRangeList getAddrRanges();
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public:
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PioPort(PioDevice *dev, System *s, std::string pname = "-pioport");
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};
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class DmaPort : public Port
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{
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protected:
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struct DmaReqState : public Packet::SenderState, public FastAlloc
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{
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/** Event to call on the device when this transaction (all packets)
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* complete. */
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Event *completionEvent;
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/** Where we came from for some sanity checking. */
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Port *outPort;
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/** Total number of bytes that this transaction involves. */
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Addr totBytes;
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/** Number of bytes that have been acked for this transaction. */
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Addr numBytes;
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/** Amount to delay completion of dma by */
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Tick delay;
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DmaReqState(Event *ce, Port *p, Addr tb, Tick _delay)
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: completionEvent(ce), outPort(p), totBytes(tb), numBytes(0),
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delay(_delay)
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{}
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};
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MemObject *device;
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std::list<PacketPtr> transmitList;
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/** The system that device/port are in. This is used to select which mode
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* we are currently operating in. */
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System *sys;
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/** Number of outstanding packets the dma port has. */
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int pendingCount;
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/** If a dmaAction is in progress. */
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int actionInProgress;
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/** If we need to drain, keep the drain event around until we're done
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* here.*/
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Event *drainEvent;
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/** time to wait between sending another packet, increases as NACKs are
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* recived, decreases as responses are recived. */
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Tick backoffTime;
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/** Minimum time that device should back off for after failed sendTiming */
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Tick minBackoffDelay;
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/** Maximum time that device should back off for after failed sendTiming */
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Tick maxBackoffDelay;
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/** If the port is currently waiting for a retry before it can send whatever
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* it is that it's sending. */
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bool inRetry;
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/** Port accesses a cache which requires snooping */
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bool recvSnoops;
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virtual bool recvTiming(PacketPtr pkt);
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virtual Tick recvAtomic(PacketPtr pkt)
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{
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if (recvSnoops) return 0;
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panic("dma port shouldn't be used for pio access."); M5_DUMMY_RETURN
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}
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virtual void recvFunctional(PacketPtr pkt)
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{
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if (recvSnoops) return;
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panic("dma port shouldn't be used for pio access.");
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}
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virtual void recvRangeChange()
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{
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// DMA port is a master with a single slave so there is no choice and
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// thus no need to worry about any address changes
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}
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virtual void recvRetry() ;
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virtual bool isSnooping()
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{ return recvSnoops; }
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void queueDma(PacketPtr pkt, bool front = false);
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void sendDma();
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/** event to give us a kick every time we backoff time is reached. */
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EventWrapper<DmaPort, &DmaPort::sendDma> backoffEvent;
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public:
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DmaPort(MemObject *dev, System *s, Tick min_backoff, Tick max_backoff,
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bool recv_snoops = false);
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void dmaAction(Packet::Command cmd, Addr addr, int size, Event *event,
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uint8_t *data, Tick delay, Request::Flags flag = 0);
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bool dmaPending() { return pendingCount > 0; }
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unsigned cacheBlockSize() const { return peerBlockSize(); }
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unsigned int drain(Event *de);
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};
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/**
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* This device is the base class which all devices senstive to an address range
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* inherit from. There are three pure virtual functions which all devices must
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* implement getAddrRanges(), read(), and write(). The magic do choose which
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* mode we are in, etc is handled by the PioPort so the device doesn't have to
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* bother.
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*/
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class PioDevice : public MemObject
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{
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protected:
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/** The platform we are in. This is used to decide what type of memory
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* transaction we should perform. */
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Platform *platform;
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System *sys;
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/** The pioPort that handles the requests for us and provides us requests
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* that it sees. */
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PioPort *pioPort;
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/**
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* Every PIO device is obliged to provide an implementation that
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* returns the address ranges the device responds to.
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*
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* @return a list of non-overlapping address ranges
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*/
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virtual AddrRangeList getAddrRanges() = 0;
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/** Pure virtual function that the device must implement. Called
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* when a read command is recieved by the port.
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* @param pkt Packet describing this request
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* @return number of ticks it took to complete
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*/
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virtual Tick read(PacketPtr pkt) = 0;
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/** Pure virtual function that the device must implement. Called when a
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* write command is recieved by the port.
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* @param pkt Packet describing this request
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* @return number of ticks it took to complete
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*/
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virtual Tick write(PacketPtr pkt) = 0;
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public:
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typedef PioDeviceParams Params;
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PioDevice(const Params *p);
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virtual ~PioDevice();
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const Params *
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params() const
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{
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return dynamic_cast<const Params *>(_params);
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}
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virtual void init();
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virtual unsigned int drain(Event *de);
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virtual Port *getPort(const std::string &if_name, int idx = -1);
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friend class PioPort;
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};
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class BasicPioDevice : public PioDevice
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{
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protected:
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/** Address that the device listens to. */
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Addr pioAddr;
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/** Size that the device's address range. */
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Addr pioSize;
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/** Delay that the device experinces on an access. */
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Tick pioDelay;
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public:
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typedef BasicPioDeviceParams Params;
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BasicPioDevice(const Params *p);
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const Params *
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params() const
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{
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return dynamic_cast<const Params *>(_params);
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}
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/**
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* Determine the address ranges that this device responds to.
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*
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* @return a list of non-overlapping address ranges
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*/
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virtual AddrRangeList getAddrRanges();
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};
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class DmaDevice : public PioDevice
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{
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protected:
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DmaPort *dmaPort;
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public:
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typedef DmaDeviceParams Params;
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DmaDevice(const Params *p);
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virtual ~DmaDevice();
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const Params *
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params() const
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{
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return dynamic_cast<const Params *>(_params);
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}
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void dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick delay = 0)
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{
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dmaPort->dmaAction(MemCmd::WriteReq, addr, size, event, data, delay);
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}
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void dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay = 0)
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{
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dmaPort->dmaAction(MemCmd::ReadReq, addr, size, event, data, delay);
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}
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bool dmaPending() { return dmaPort->dmaPending(); }
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virtual unsigned int drain(Event *de);
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unsigned cacheBlockSize() const { return dmaPort->cacheBlockSize(); }
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virtual Port *getPort(const std::string &if_name, int idx = -1);
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friend class DmaPort;
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};
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#endif // __DEV_IO_DEVICE_HH__
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