Vishnu Ramadas 06161ded8c dev-amdgpu: Add VMID map to checkpoint ...

When restoring checkpoints for certain applications, gem5 tries to
create new doorbells with a pre-existing queue ID and simulation crashes
shortly after. This commit checkpoints the existing VMID map so that any
new doorbells after restoration use a unique queue ID

Change-Id: I9bf89a2769db26ceab4441634ff2da936eea6d6f

2023-11-20 21:19:17 -06:00

..

arch

arch-riscv: Add overrides to RISC-V Interrupts class (#568)

2023-11-15 18:36:15 -08:00

base

base: Add ability to generate SymbolTable by filtering SymbolType

2023-10-30 21:35:01 +00:00

cpu

cpu: Remove SLC bit restraint for GPU tester (#552)

2023-11-14 03:47:34 -08:00

dev

dev-amdgpu: Add VMID map to checkpoint

2023-11-20 21:19:17 -06:00

doc

…

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

gpu-compute: Update GPR allocation counts

2023-11-01 14:52:39 -05:00

kern

misc: Fix buggy special path comparisons

2023-09-05 13:44:10 -07:00

learning_gem5

cpu: Explicitly define cache_line_size -> 64-bit unsigned int (#329)

2023-10-16 07:50:35 -07:00

mem

mem-cache: Prefetchers Improvements (#564)

2023-11-16 15:22:26 -08:00

proto

scons: Explicit the config option HAVE_PROTOBUF type boolean

2023-10-20 11:46:02 +08:00

python

stdlib, resources: Update JSON data in workload (#532)

2023-11-16 10:11:13 -08:00

sim

base,sim: Add the SymbolType field to the Symbol object

2023-10-30 21:35:01 +00:00

sst

mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner

2023-02-03 06:11:45 +00:00

systemc

systemc: Fix two bugs in gem5-to-tlm bridge (#542)

2023-11-14 08:02:58 -08:00

Doxyfile

misc: Update version info for develop branch

2023-07-10 12:28:44 -07:00

SConscript

python: Add importer to standalone gem5py_m5

2023-09-28 11:22:33 -07:00