Add hit and miss print for TCP and TCC cache with RubyHitMiss debug flag Change-Id: I40ae3449020b917f39ac91d29fa4e1dd7c791e7b
69 lines
3.1 KiB
Plaintext
69 lines
3.1 KiB
Plaintext
/*
|
|
* Copyright (c) 2020 Advanced Micro Devices, Inc.
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions are met:
|
|
*
|
|
* 1. Redistributions of source code must retain the above copyright notice,
|
|
* this list of conditions and the following disclaimer.
|
|
*
|
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
* this list of conditions and the following disclaimer in the documentation
|
|
* and/or other materials provided with the distribution.
|
|
*
|
|
* 3. Neither the name of the copyright holder nor the names of its
|
|
* contributors may be used to endorse or promote products derived from this
|
|
* software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
|
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
*/
|
|
|
|
structure (GPUCoalescer, external = "yes") {
|
|
void readCallback(Addr, DataBlock);
|
|
void readCallback(Addr, MachineType, DataBlock, bool);
|
|
void readCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles, bool);
|
|
void readCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles, bool, bool);
|
|
void writeCallback(Addr, DataBlock);
|
|
void writeCallback(Addr, MachineType, DataBlock);
|
|
void writeCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles);
|
|
void writeCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles, bool);
|
|
void evictionCallback(Addr);
|
|
void recordCPReadCallBack(MachineID, MachineID);
|
|
void recordCPWriteCallBack(MachineID, MachineID);
|
|
}
|
|
|
|
structure (VIPERCoalescer, external = "yes") {
|
|
void readCallback(Addr, DataBlock);
|
|
void readCallback(Addr, MachineType, DataBlock, bool);
|
|
void readCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles, bool);
|
|
void readCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles, bool, bool);
|
|
void writeCallback(Addr, DataBlock);
|
|
void writeCallback(Addr, MachineType, DataBlock);
|
|
void writeCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles);
|
|
void writeCallback(Addr, MachineType, DataBlock,
|
|
Cycles, Cycles, Cycles, bool);
|
|
void atomicCallback(Addr, MachineType, DataBlock);
|
|
void invTCPCallback(Addr);
|
|
void invTCCCallback(Addr);
|
|
void writeCompleteCallback(Addr, uint64_t);
|
|
void evictionCallback(Addr);
|
|
}
|