Remove the line "For use for simulation and test purposes only" in files were AMD is the only copyright holder listed in the header. This happens to be the case for all files where this line exists, removing it completely from gem5. Change-Id: I623f266b002f564301b28774f49081099cfc60fd Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53943 Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
180 lines
4.9 KiB
C++
180 lines
4.9 KiB
C++
/*
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* Copyright (c) 2011-2017 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __MISC_HH__
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#define __MISC_HH__
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#include <bitset>
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#include <limits>
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#include <memory>
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#include "base/logging.hh"
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#include "sim/clocked_object.hh"
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namespace gem5
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{
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class GPUDynInst;
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typedef std::bitset<std::numeric_limits<unsigned long long>::digits>
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VectorMask;
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typedef std::shared_ptr<GPUDynInst> GPUDynInstPtr;
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enum InstMemoryHop : int
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{
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Initiate = 0,
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CoalsrSend = 1,
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CoalsrRecv = 2,
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GMEnqueue = 3,
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Complete = 4,
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InstMemoryHopMax = 5
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};
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enum BlockMemoryHop : int
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{
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BlockSend = 0,
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BlockRecv = 1
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};
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class WaitClass
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{
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public:
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WaitClass() : nxtAvail(0), lookAheadAvail(0), clockedObject(nullptr) { }
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WaitClass(ClockedObject *_clockedObject, uint64_t _numStages=0)
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: nxtAvail(0), lookAheadAvail(0), clockedObject(_clockedObject),
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numStages(_numStages) { }
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void init(ClockedObject *_clockedObject, uint64_t _numStages=0)
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{
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clockedObject = _clockedObject;
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numStages = _numStages;
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}
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void set(uint64_t i)
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{
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fatal_if(nxtAvail > clockedObject->clockEdge(),
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"Can't allocate resource because it is busy!!!");
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nxtAvail = clockedObject->clockEdge() + i;
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}
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void preset(uint64_t delay)
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{
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lookAheadAvail = std::max(lookAheadAvail, delay +
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(clockedObject->clockEdge()) - numStages);
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}
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bool rdy(Cycles cycles = Cycles(0)) const
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{
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return clockedObject->clockEdge(cycles) >= nxtAvail;
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}
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bool prerdy() const
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{
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return clockedObject->clockEdge() >= lookAheadAvail;
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}
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private:
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// timestamp indicating when resource will be available
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uint64_t nxtAvail;
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// timestamp indicating when resource will be available including
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// pending uses of the resource (when there is a cycle gap between
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// rdy() and set()
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uint64_t lookAheadAvail;
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// clockedObject for current timestamp
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ClockedObject *clockedObject;
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// number of stages between checking if a resource is ready and
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// setting the resource's utilization
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uint64_t numStages;
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};
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class Float16
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{
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public:
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uint16_t val;
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Float16() { val = 0; }
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Float16(const Float16 &x) : val(x.val) { }
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Float16(float x)
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{
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uint32_t ai = *(reinterpret_cast<uint32_t *>(&x));
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uint32_t s = (ai >> 31) & 0x1;
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uint32_t exp = (ai >> 23) & 0xff;
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uint32_t mant = (ai >> 0) & 0x7fffff;
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if (exp == 0 || exp <= 0x70) {
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exp = 0;
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mant = 0;
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} else if (exp == 0xff) {
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exp = 0x1f;
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} else if (exp >= 0x8f) {
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exp = 0x1f;
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mant = 0;
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} else {
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exp = exp - 0x7f + 0x0f;
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}
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mant = mant >> 13;
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val = 0;
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val |= (s << 15);
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val |= (exp << 10);
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val |= (mant << 0);
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}
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operator float() const
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{
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uint32_t s = (val >> 15) & 0x1;
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uint32_t exp = (val >> 10) & 0x1f;
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uint32_t mant = (val >> 0) & 0x3ff;
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if (!exp) {
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exp = 0;
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mant = 0;
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} else if (exp == 0x1f) {
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exp = 0xff;
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} else {
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exp = exp - 0x0f + 0x7f;
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}
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uint32_t val1 = 0;
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val1 |= (s << 31);
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val1 |= (exp << 23);
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val1 |= (mant << 13);
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return *(reinterpret_cast<float *>(&val1));
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}
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};
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} // namespace gem5
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#endif // __MISC_HH__
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