Giacomo Travaglini 03176aa025 arch-arm: Define an Affinity type ...

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I42461de26886b1ba9e4db5b23a9fb970d3a1efd7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55705
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2022-02-03 16:36:29 +00:00

..

arch

arch-arm: Define an Affinity type

2022-02-03 16:36:29 +00:00

base

misc: Linearlize VecElem indexing.

2022-01-21 23:05:47 +00:00

cpu

cpu: Get rid of the unused o3::ThreadContext::readReg.

2022-02-03 00:42:53 +00:00

dev

dev-arm: Use ArmISA::getAffinity in GICv3 redistributor

2022-02-03 16:36:11 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

base,misc: Add group definitions for newly tagged API in src/base

2020-09-08 22:29:43 +00:00

gpu-compute

misc: Remove AMD license addition

2021-12-11 04:00:56 +00:00

kern

sim-se: Add additional TGT_AT_* constants for Linux.

2021-11-24 22:48:17 +00:00

learning_gem5

scons: Add sim_object and enums arguments to SimObject().

2021-12-08 08:01:23 +00:00

mem

mem-ruby: Fix -Werror=unused-variable from recent ruby patch

2022-01-28 09:05:22 +00:00

proto

sim,misc: Move protobuf housekeeping out of gem5Main.

2021-12-08 08:01:23 +00:00

python

stdlib: Remove final decorator from abstract board

2022-01-25 09:07:25 +00:00

sim

cpu-kvm: Move the validKvmEnvironment method into KvmVM.

2022-02-02 01:45:58 +00:00

sst

scons: Add sim_object and enums arguments to SimObject().

2021-12-08 08:01:23 +00:00

systemc

systemc: Fixed ctor ordering for sc_fifo.hh

2022-01-25 08:59:56 +00:00

Doxyfile

misc: Revert v21.2 specific commits for develop

2021-12-28 21:30:21 +00:00

SConscript

scons: protobuf builder, support source paths

2022-01-26 08:01:50 +00:00