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14931 Commits

Author SHA1 Message Date
Ali Saidi
ed27c4c521 SCons: Manually specifying header only directories with Dir() works around the problem 
--HG--
extra : convert_revision : d9713228d934cf4a45114a972603b8bca2bd27d3
 2008-04-08 11:08:26 -04:00
Ali Saidi
1605fbebc8 IGbE: Fix bug that limits wire performance a bit 
--HG--
extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
 2008-03-25 15:58:54 -04:00
Steve Reinhardt
ba1f7d31e0 Automated merge with ssh://daystrom.m5sim.org//repo/m5 
--HG--
extra : convert_revision : 7922848bb1145bcb2ee07d672d21cfe2dd98fc03
 2008-03-25 10:04:52 -04:00
Steve Reinhardt
29be31ce31 Fix handling of writeback-induced writebacks in atomic mode. 
--HG--
extra : convert_revision : 4fa64f8a929f1aa36a9d5a71b8d1816b497aca4c
 2008-03-25 10:01:21 -04:00
Gabe Black
93dd1978a7 X86: Put an RTC into the CMOS part of the southbridge. 
--HG--
extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3
 2008-03-25 02:15:23 -04:00
Gabe Black
e5bdae15f3 Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it. 
--HG--
extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
 2008-03-25 02:15:06 -04:00
Gabe Black
af9a57566a X86: Turn #defines into consts. 
--HG--
extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa
 2008-03-25 02:09:18 -04:00
Gabe Black
48409ca512 X86: Start implementing the south bridge stuff. 
--HG--
extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
 2008-03-25 02:08:54 -04:00
Gabe Black
b0c52885ce X86: Change the Opteron platform to be the PC platform. 
--HG--
extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
 2008-03-25 02:06:53 -04:00
Steve Reinhardt
623dd7ed3a Delete the Request for a no-response Packet 
when the Packet is deleted, since the requester
can't possibly do it.

--HG--
extra : convert_revision : 8571b144ecb3c70efc06d09faa8b3161fb58352d
 2008-03-24 01:08:02 -04:00
Steve Reinhardt
93ab43288a Don't FastAlloc MSHRs since we don't allocate them on the fly. 
--HG--
extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
 2008-03-24 01:08:02 -04:00
Steve Reinhardt
627592c2f2 Add FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct options. 
--HG--
extra : convert_revision : 56a7f646f2ac87019c78ba7fa62c5f4bdc00ba44
 2008-03-24 01:08:02 -04:00
Steve Reinhardt
407710d387 Fix cache problem with writes to tempBlock 
getting wrong writeback address.

--HG--
extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
 2008-03-22 22:17:15 -04:00
Gabe Black
3fe1af7952 MIPS: Check endianness of binaries in SE mode. 
--HG--
extra : convert_revision : e6c4bda6078eb68a26f8834411f744078c6bf5a9
 2008-03-20 02:10:21 -04:00
Steve Reinhardt
b051ae6acc Fix a few Packet memory leaks. 
--HG--
extra : convert_revision : 00db19f0698c0786f0dff561eea9217860a5a05a
 2008-03-17 03:08:28 -04:00
Steve Reinhardt
131c65f429 Restructure bus timing calcs to cope with pkt being deleted by target. 
--HG--
extra : convert_revision : db8497e73a44f2a06aab121e797e88b4c0c31330
 2008-03-17 03:07:38 -04:00
Steve Reinhardt
19c367fa8f Fix subtle cache bug where read could return stale data 
if a prior write miss arrived while an even earlier
read miss was still outstanding.

--HG--
extra : convert_revision : 4924e145829b2ecf4610b88d33f4773510c6801a
 2008-03-15 05:03:55 -07:00
Gabe Black
50946b1673 Merge 
--HG--
extra : convert_revision : ec5f41b2007ade15f6f4c4a1533e50f9cba2798e
 2008-03-06 21:09:15 -05:00
Gabe Black
a245b0eedf X86: Refine the local APIC. 
--HG--
extra : convert_revision : 2789c54ed555fed2f2a333fcc7dc6454f294ebf2
 2008-03-06 20:37:28 -05:00
Vilas Sridharan
21fd15ad9a O3CPU: Don't call dumpInsts if DEBUG is not defined 
--HG--
extra : convert_revision : 3194bde4c624d118969bfbf92282539963a72245
 2008-03-06 00:27:09 -05:00
Gabe Black
66aaabf4ae X86: Don't map the local APIC into the physical address space in SE mode. 
--HG--
extra : convert_revision : b7103974b12130bbf43583c4cb5294b808add208
 2008-03-01 00:05:12 -05:00
Steve Reinhardt
19dfde2317 Automated merge with ssh://daystrom.m5sim.org//repo/m5 
--HG--
extra : convert_revision : f4bcd342e7abb86ca83840b723e6ab0b861ecf5b
 2008-02-27 18:18:56 -05:00
Korey Sewell
8fb74c238c Add comments in code to describe bug conditions. 
This should help if somebody gets to the bug
fix before me (or someone else)...

--HG--
extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2
 2008-02-27 17:50:29 -05:00
Korey Sewell
b45cf21a8e Fix Load/Store Queue squashing after a SMT thread is removed but ensuring 
you are squashing from the current instruction # causing the thread exit.

--HG--
extra : convert_revision : ccbeece7dd1d5fee43f30ab19370908972113473
 2008-02-27 16:53:08 -05:00
Korey Sewell
34715cc691 Fix offset in removeThread() function so that float registers start freeing up 
from the right point (#32 usually) instead of restarting at 0 and double-freeing.

Commented out assert line in free_list.hh that will check for when double-free condition
goes bad.

--HG--
extra : convert_revision : 08d5f9b6a874736e487d101e85c22aaa67bf59ae
 2008-02-27 16:48:33 -05:00
Steve Reinhardt
e6d6adc731 Revamp cache timing access mshr check to make stats sane again. 
--HG--
extra : convert_revision : 37009b8ee536807073b5a5ca07ed1d097a496aea
 2008-02-26 22:03:28 -08:00
Rick Strong
fcfc8b8c4f Configs: Make using Simpoints easier with some config files that support them easily 
--HG--
extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
 2008-02-27 00:35:09 -05:00
Gabe Black
43ecce5fda X86: Put in initial implementation of the local APIC. 
--HG--
extra : convert_revision : 1708a93d96b819e64ed456c75dbb5325ac8114a8
 2008-02-26 23:39:53 -05:00
Gabe Black
98d2ca403e X86: Implement the INVLPG instruction and the TIA microop. 
--HG--
extra : convert_revision : 31db1ee082f6c3ca5443cba1eb335e408661ead2
 2008-02-26 23:39:22 -05:00
Gabe Black
8b4796a367 TLB: Make a TLB base class and put a virtual demapPage function in it. 
--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
 2008-02-26 23:38:51 -05:00
Gabe Black
7bde0285e5 X86: Get PCI config space to work, and adjust address space prefix numbering scheme. 
--HG--
extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
 2008-02-26 23:38:01 -05:00
Steve Reinhardt
bdf3323915 Cache: better comments particularly regarding writeback situation. 
--HG--
extra : convert_revision : 59ff9ee63ee0fec5a7dfc27b485b737455ccf362
 2008-02-26 20:17:26 -08:00
Gabe Black
ec1a4cbbc7 Bus: Fix the bus timing to be more realistic. 
--HG--
extra : convert_revision : acd70dc98ab840e55b114706fbb6afb2a95e54bc
 2008-02-26 02:20:08 -05:00
Steve Reinhardt
4597a71cef Make L2+ caches allocate new block for writeback misses 
instead of forwarding down the line.

--HG--
extra : convert_revision : b0d6e7862c92ea7a2d21f817d30398735e7bb8ba
 2008-02-16 14:58:03 -05:00
Ali Saidi
9faec83ac5 CPU: move the PC Events code to a place where the code won't be executed multiple times if an instruction faults. 
--HG--
extra : convert_revision : 19c8e46a4eea206517be7ed4131ab9df0fe00e68
 2008-02-14 16:14:35 -05:00
Ali Saidi
a33a3f7c55 Update copyright dates 
--HG--
extra : convert_revision : 547e7ddff6b8005a9eaad60970bc51984e84fcd1
 2008-02-11 12:35:28 -05:00
Steve Reinhardt
71835d42df Automated merge with file:/home/stever/hg/m5-orig 
--HG--
extra : convert_revision : 86a55cd98a9704f756a70aa0cbd2820cf92c821d
 2008-02-11 08:31:26 -08:00
Steve Reinhardt
2f7421b12b EXTRAS now points to src instead of needing 'src' subdir. 
--HG--
extra : convert_revision : 8e7e4516ace8c7852eeea3c479bfd567839a8061
 2008-02-11 08:04:01 -08:00
Nicolas Zea
4c7eb21119 Bus: Only update port cache when there is an item to update it with. 
--HG--
extra : convert_revision : 84848fd48bb9e6693a0518c862364142b1969aa8
 2008-02-10 19:41:03 -05:00
Ali Saidi
d167e2bb97 IGbE: Fix a couple of bugs. 
--HG--
extra : convert_revision : a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca
 2008-02-10 19:32:12 -05:00
Steve Reinhardt
9d7a69c582 Fix #include lines for renamed cache files. 
--HG--
extra : convert_revision : b5008115dc5b34958246608757e69a3fa43b85c5
 2008-02-10 14:45:25 -08:00
Steve Reinhardt
d56e77c180 Rename cache files for brevity and consistency with rest of tree. 
--HG--
rename : src/mem/cache/base_cache.cc => src/mem/cache/base.cc
rename : src/mem/cache/base_cache.hh => src/mem/cache/base.hh
rename : src/mem/cache/cache_blk.cc => src/mem/cache/blk.cc
rename : src/mem/cache/cache_blk.hh => src/mem/cache/blk.hh
rename : src/mem/cache/cache_builder.cc => src/mem/cache/builder.cc
rename : src/mem/cache/miss/mshr.cc => src/mem/cache/mshr.cc
rename : src/mem/cache/miss/mshr.hh => src/mem/cache/mshr.hh
rename : src/mem/cache/miss/mshr_queue.cc => src/mem/cache/mshr_queue.cc
rename : src/mem/cache/miss/mshr_queue.hh => src/mem/cache/mshr_queue.hh
rename : src/mem/cache/prefetch/base_prefetcher.cc => src/mem/cache/prefetch/base.cc
rename : src/mem/cache/prefetch/base_prefetcher.hh => src/mem/cache/prefetch/base.hh
rename : src/mem/cache/prefetch/ghb_prefetcher.cc => src/mem/cache/prefetch/ghb.cc
rename : src/mem/cache/prefetch/ghb_prefetcher.hh => src/mem/cache/prefetch/ghb.hh
rename : src/mem/cache/prefetch/stride_prefetcher.cc => src/mem/cache/prefetch/stride.cc
rename : src/mem/cache/prefetch/stride_prefetcher.hh => src/mem/cache/prefetch/stride.hh
rename : src/mem/cache/prefetch/tagged_prefetcher.cc => src/mem/cache/prefetch/tagged.cc
rename : src/mem/cache/prefetch/tagged_prefetcher.hh => src/mem/cache/prefetch/tagged.hh
rename : src/mem/cache/tags/base_tags.cc => src/mem/cache/tags/base.cc
rename : src/mem/cache/tags/base_tags.hh => src/mem/cache/tags/base.hh
rename : src/mem/cache/tags/Repl.py => src/mem/cache/tags/iic_repl/Repl.py
rename : src/mem/cache/tags/repl/gen.cc => src/mem/cache/tags/iic_repl/gen.cc
rename : src/mem/cache/tags/repl/gen.hh => src/mem/cache/tags/iic_repl/gen.hh
rename : src/mem/cache/tags/repl/repl.hh => src/mem/cache/tags/iic_repl/repl.hh
extra : convert_revision : ff7a35cc155a8d80317563c45cebe405984eac62
 2008-02-10 14:15:42 -08:00
Stephen Hines
6cc1573923 Make the Event::description() a const function 
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
 2008-02-06 16:32:40 -05:00
Stephen Hines
0ccf9a2c37 Add base ARM code to M5 
--HG--
extra : convert_revision : d811bf87d1a0bfc712942ecd3db1b48fc75257af
 2008-02-05 23:44:13 -05:00
Steve Reinhardt
b96631e1a0 Cleaned up os.path imports a bit. 
--HG--
extra : convert_revision : ee75bf9abd249ab053e804739cc50972475cd5b6
 2008-02-05 17:43:45 -08:00
Steve Reinhardt
d725ff450d Make EXTRAS work for SConsopts too. 
Requires pushing source files down into 'src' subdir relative
to directory listed in EXTRAS.

--HG--
extra : convert_revision : ca04adc3e24c60bd3e7b63ca5770b31333d76729
 2008-02-05 17:40:08 -08:00
Gabe Black
ca313e2303 X86: Put an SMBios/DMI table in memory. 
This is basically just the header right now, but there's an untested
mechanism in place to fill out the table and make sure everything is
updated correctly.

--HG--
extra : convert_revision : c1610c0dfa211b7e0d091a04133695d84f500a1c
 2008-01-23 15:28:54 -05:00
Gabe Black
423bbe6499 X86: Optomize the bit scanning instruction microassembly a little. More can be done. 
--HG--
extra : convert_revision : 3cf6e972f0e41e3529a633ecbb31289e1bd17f0f
 2008-01-23 08:18:27 -05:00
Gabe Black
60c2d98fc0 X86: Implement and attach the BSR and BSF instructions. 
--HG--
extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908
 2008-01-22 00:10:33 -05:00
Gabe Black
f809637011 X86: Fill out group17 in the decoder. 
--HG--
extra : convert_revision : 66ab9c0fc3086f66e3d6d82d47964ecf406c3a8a
 2008-01-21 16:27:40 -05:00