Commit Graph

280 Commits

Author SHA1 Message Date
Gabe Black
0ed6c52c1e Made the alpha setSyscallReturn take a ThreadContext pointer instead of a RegFile *.
--HG--
extra : convert_revision : 021a1fe6760df1daf6299d46060371a5310f008a
2006-12-06 11:33:37 -05:00
Gabe Black
b3cfa6ec42 Added a flattenIntIndex function for Alpha.
--HG--
extra : convert_revision : 5ed79ed18e443118a28d6890327c55a6a3fcd325
2006-12-06 11:30:41 -05:00
Gabe Black
dc105934f3 Change to use -return_value.value like other implementations.
--HG--
extra : convert_revision : 513422c1c8c24f3662e6a423d13ee033424aa44b
2006-12-06 05:47:19 -05:00
Gabe Black
bf5f6c6430 Some changes for misc regs which were changed into unofficial integer registers, and moved the flattenIndex function into the register file.
--HG--
extra : convert_revision : 6b797c793a6c12c61a23f0f78a1ea1c88609553e
2006-12-06 05:46:44 -05:00
Gabe Black
5ad1731a12 Reorganize the includes and add an include for misc.hh.
--HG--
extra : convert_revision : 484b2d07a1e8b3879c35d80bf16b73fd0cc9be1f
2006-12-06 05:45:18 -05:00
Gabe Black
643cb6dd81 Added some debug output, and made sure not to accidentally ask for the result of a store conditional.
--HG--
extra : convert_revision : d36ff9e2343fdf78a3bc16a1348975fdba5c55e2
2006-12-06 05:44:31 -05:00
Gabe Black
a36a59e8d7 Some basic fix ups, and CWP is no longer set explicitly.
--HG--
extra : convert_revision : 1dde5594a2bcfd9fb5ad974360b3dc035f1624e5
2006-12-06 05:43:25 -05:00
Gabe Black
c541be3a48 Changed the integer register file to work with flattened indices.
--HG--
extra : convert_revision : c5153c3c712e5d18b5233e1fd205806adcb30654
2006-12-06 05:42:09 -05:00
Gabe Black
4d8a0541dd Change MIPS's setSyscallReturn to use a thread context.
--HG--
extra : convert_revision : 618f8404ec5380615e28170d761b2fcdf9c07d96
2006-12-06 05:41:08 -05:00
Gabe Black
a3f351ab59 Added basic flatten function for mips.
--HG--
extra : convert_revision : 2c32851584001734d139f36c4d58c5e61067fcfc
2006-12-06 05:40:11 -05:00
Gabe Black
12c5bd2305 Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed.
src/arch/alpha/syscallreturn.hh:
src/arch/mips/syscallreturn.hh:
src/sim/syscallreturn.hh:
    Move the SyscallReturn class into sim/syscallreturn.hh
src/arch/sparc/faults.cc:
src/arch/sparc/isa/operands.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/arch/sparc/process.cc:
src/arch/sparc/sparc_traits.hh:
    Move some miscregs into the integer register file so they get renamed.

--HG--
extra : convert_revision : df5b94fa1e7fdca34816084e0a423d6fdf86c79b
2006-12-05 01:55:02 -05:00
Gabe Black
f2daf210f1 Initial changes to get O3 working with SPARC
src/arch/sparc/process.cc:
    MachineBytes doesn't exist any more.
src/arch/sparc/regfile.cc:
    Add in the miscRegFile for good measure.
src/cpu/o3/isa_specific.hh:
    Add in a section for SPARC
src/cpu/o3/sparc/cpu.cc:
src/cpu/o3/sparc/cpu.hh:
src/cpu/o3/sparc/cpu_builder.cc:
src/cpu/o3/sparc/cpu_impl.hh:
src/cpu/o3/sparc/dyn_inst.cc:
src/cpu/o3/sparc/dyn_inst.hh:
src/cpu/o3/sparc/dyn_inst_impl.hh:
src/cpu/o3/sparc/impl.hh:
src/cpu/o3/sparc/params.hh:
src/cpu/o3/sparc/thread_context.cc:
src/cpu/o3/sparc/thread_context.hh:
    Sparc version of this file.

--HG--
extra : convert_revision : 34bb5218f802d0a1328132a518cdd769fb59b6a4
2006-11-24 22:06:33 -05:00
Gabe Black
5f446e36b6 Merge zower:/eecshome/m5/newmem
into  ewok.(none):/home/gblack/m5/newmemo3

--HG--
extra : convert_revision : e8d6ce19a83fe526112c1dd61c48196eb8c0951f
2006-11-24 14:08:44 -05:00
Gabe Black
d0f4a4c441 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 7dbd30ce5579dd62d5f54bb5d75cf12346bc5d1d
2006-11-24 14:08:43 -05:00
Gabe Black
c6ddab95df Rename this function.
--HG--
extra : convert_revision : 57ea1e1d3b75e35abb3310d392ec70086fff699a
2006-11-24 14:01:18 -05:00
Gabe Black
7708217167 Fix weird type modifier.
--HG--
extra : convert_revision : 7372b7a92b3c9d05388acb43ba58ada18464fa24
2006-11-24 14:00:45 -05:00
Gabe Black
96a6af98e2 Fix an include problem.
--HG--
extra : convert_revision : 89be55bd3f4f9b452a680a98b69ce42b80546769
2006-11-24 14:00:00 -05:00
Steve Reinhardt
28f8318252 Add no-op versions of ivlb and ivle back in for backwards compatibility.
--HG--
extra : convert_revision : 383b72c130b20f3d7cde4e08fa36a481f3c0bf7c
2006-11-24 12:32:33 -05:00
Gabe Black
de445b5e96 Fixes to the isa description.
src/arch/sparc/isa/base.isa:
    Fix a constant.
src/arch/sparc/isa/decoder.isa:
    Made carry calculation more consistent.
src/arch/sparc/isa/operands.isa:
    Use the right constant.

--HG--
extra : convert_revision : 25b3a09ff20d4b8e1a95ee8a983d14ef3cfe73bb
2006-11-23 00:36:42 -05:00
Gabe Black
758c780651 Moved some constants from isa_traits.hh to the reg file headers.
--HG--
extra : convert_revision : 378b2d9791e6282539900a2261ad2275d726b4be
2006-11-22 23:49:44 -05:00
Gabe Black
0a99750ebf Merge zizzer:/bk/sparcfs
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 75f3398e38e18eb1f8248e23708d7a8d8cce0fc5
2006-11-22 15:45:32 -05:00
Gabe Black
b4a31cb8b5 Make sure only real bits of pstate can be set.
--HG--
extra : convert_revision : 8707bbed2aeb80613f86503e92b63853767adaa9
2006-11-20 18:08:50 -05:00
Gabe Black
a0287c1e2d Set the pstate.priv bit to 1 in hyperpriveleged mode. The description in the manual of what happens during a trap says it should be 0, and other places say it doesn't matter.
--HG--
extra : convert_revision : 9ecb6af06657e936a208cbeb8e4a18305869b949
2006-11-20 18:07:58 -05:00
Gabe Black
cd2727694d Add in rom/rams for the nvram, hypervisor description, and partition description.
--HG--
extra : convert_revision : a49de5fcfbea307c971964b8a68b95eb5d9a2bf4
2006-11-20 17:59:35 -05:00
Kevin Lim
719416b60f Fix typo.
--HG--
extra : convert_revision : 2dd830c6b3b5df894608b7596250b0181a3dfdf0
2006-11-20 11:44:27 -05:00
Nathan Binkert
31d829d388 Implement current working directory for LiveProcesses
--HG--
extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
2006-11-16 12:43:11 -08:00
Gabe Black
74654ddd1f Merge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 74b2352b8f088e38cd1ecf3a8233b45df0476d93
2006-11-16 14:42:44 -05:00
Gabe Black
cd5b33b9ff Fixes for SPARC_FS
configs/common/FSConfig.py:
    Make a SPARC system create an IO bus.
src/python/m5/objects/T1000.py:
    Create a T1000 platform
src/arch/sparc/miscregfile.cc:
    Initialize the strand status register to the value legion provides.
src/cpu/exetrace.cc:
    Truncate an ExtMachInst to a MachInst before comparing with Legion.

--HG--
extra : convert_revision : e4189b572a5297e8362f5bd26d87b74736c8e5f1
2006-11-16 12:34:10 -05:00
Gabe Black
ac2c7967f6 Merge zizzer.eecs.umich.edu:/bk/newmem/
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : 966246877ac1f1e6c2675d413b0b405cccfecbeb
2006-11-14 15:23:23 -05:00
Lisa Hsu
ee777f35c2 interrupts.hh:
make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build

src/arch/sparc/interrupts.hh:
    make a likewise updateIntrInfo for Sparc that's blank so it doesn't fart on build

--HG--
extra : convert_revision : 5f469d0cf897479b42703104cd801a8ef923fcae
2006-11-14 12:59:57 -05:00
Gabe Black
7632198a6e Merge 141.212.106.238:/home/gblack/m5/newmemmemops
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : cda58e6e63f2f909b85a510fb76d35d49d8042b9
2006-11-14 01:31:37 -05:00
Gabe Black
20730b790c Set hpstate to be what I'm assuming Legion is.
--HG--
extra : convert_revision : 0be66513cb0cff07c0c2b50c97c1ea74d52b0dc9
2006-11-14 01:30:34 -05:00
Gabe Black
c2ceaa887e Make sure a POR doesn't clobber the value of the hpstate.
--HG--
extra : convert_revision : 4504f08fd94792819bd4419bbd2e0ebd1d7f29e9
2006-11-14 01:29:11 -05:00
Gabe Black
6b95f24145 Fix up the disassembly a little.
--HG--
extra : convert_revision : 7bdf68f445b79b1b5dbcdfa5fa1005c68d03724c
2006-11-14 01:28:11 -05:00
Gabe Black
8d234a4bc5 Merge 141.212.106.238:/home/gblack/m5/newmemmemops
into  zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem

--HG--
extra : convert_revision : 753831a9f6f79d07e6ee122ab894e24161d2e722
2006-11-14 01:23:59 -05:00
Steve Reinhardt
51d8c59ef8 Merge zizzer.eecs.umich.edu:/bk/newmem
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : faab7569deefde94c20133b2f70a8567bcaa2960
2006-11-12 22:04:00 -08:00
Steve Reinhardt
0f633c5fee Make setRegWithEffect do something in SE mode.
--HG--
extra : convert_revision : 88fdaa403fe6d083f8c8fc064cb0d0d6a8b8daf8
2006-11-12 22:03:42 -08:00
Kevin Lim
3052632b68 Merge ktlim@zamp:./local/clean/tmp/test-regress
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : b98236507bb8996ce605b48b5a5a6a7aac297dc5
2006-11-12 21:57:58 -05:00
Kevin Lim
12e26c68c3 Updates to support new interrupt processing and removal of PcPAL.
src/arch/alpha/interrupts.hh:
    No need for this now that the ThreadContext is being used to set these IPRs in interrupts.
    Also split up the interrupt checking from the updating of the IPL and interrupt summary.
src/arch/alpha/tlb.cc:
    Check the PC for whether or not it's in PAL mode, not the addr.
src/cpu/o3/alpha/cpu.hh:
    Split up getting the interrupt from actually processing the interrupt.
src/cpu/o3/alpha/cpu_impl.hh:
    Splut up the processing of interrupts.
src/cpu/o3/commit_impl.hh:
    Update for ISA-oriented interrupt changes.
src/cpu/o3/fetch_impl.hh:
    Fix broken if statement from PcPAL updates, and properly populate the request fields.

    Also more debugging output.
src/cpu/ozone/cpu_impl.hh:
    Updates for ISA-oriented interrupt stuff.
src/cpu/ozone/front_end_impl.hh:
    Populate request fields properly.
src/cpu/simple/base.cc:
    Update for interrupt stuff.

--HG--
extra : convert_revision : 9bac3f9ffed4948ee788699b2fa8419bc1ca647c
2006-11-12 20:15:30 -05:00
Gabe Black
fd35f02efe Fix for CAS so that it knows about all the possible code in the constructor.
--HG--
extra : convert_revision : 863d395f8e7c8ee2aec708ffcef842317ec9a89b
2006-11-11 07:23:13 -05:00
Gabe Black
239a89e713 Certain header files should only be used in FS.
src/arch/alpha/faults.hh:
    Only use pagetable.hh in FS
src/arch/alpha/pagetable.hh:
    pagetable.hh should only be included in FS, so protecting it internally should be unnecessary.
src/cpu/exetrace.cc:
    Only use tlb.hh in FS

--HG--
extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
2006-11-11 07:15:16 -05:00
Ali Saidi
aa19b2e7bc fix endian issues with condition codes
use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?

src/arch/sparc/faults.cc:
    set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
    fix endian issues with condition codes
src/arch/sparc/tlb.hh:
    add implemented physical addres constants
src/arch/sparc/utility.hh:
    add tlb.hh to utilities
src/base/loader/raw_object.cc:
    add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
    use memcpy instead of bcopy
src/cpu/exetrace.cc:
    clean up printing a bit more
src/cpu/m5legion_interface.h:
    add tons to the shared interface
src/dev/ethertap.cc:
    s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
    fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
    hack to make sure htole() works...

--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
2006-11-10 20:17:42 -05:00
Gabe Black
6d54a77518 Elaborated on the tlb stubs so that they just set the physical address to the virtual address.
--HG--
extra : convert_revision : 41478abc4d21d504420f6842338675c0767f7cf9
2006-11-10 15:32:15 -05:00
Gabe Black
e3d8831857 Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to Ctrl_Base_DepTag.
--HG--
extra : convert_revision : 2ebb3eb781441ba936c8d8bb1f42e4c0840aff2e
2006-11-10 15:30:59 -05:00
Gabe Black
d30e3b30af Added StrandStsReg operand.
--HG--
extra : convert_revision : 51be41716ed9fe0e99e53f2341ad5651a525055a
2006-11-10 15:29:32 -05:00
Gabe Black
13a8752c11 Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble properly.
--HG--
extra : convert_revision : f2cad8a5879999438ba9b05f15a91320e7a4cc4a
2006-11-10 15:28:58 -05:00
Gabe Black
7bf1c8981d Made the annul of unconditional conditional branches behave properly, added code to read and write the strand_sts_reg, and made restored a Priv instruction.
--HG--
extra : convert_revision : 386512215f7243d230717c369217f8d2f9ada935
2006-11-10 15:27:06 -05:00
Gabe Black
27b43b62b7 Fixed up the code that prints out registers to take into account microregisters.
--HG--
extra : convert_revision : 6809de467e4500ce34447c0544caf0ba04af81e7
2006-11-10 15:25:52 -05:00
Gabe Black
8390e46311 Tweaked debug output.
--HG--
extra : convert_revision : cd33b7c1ebdbefd42f18c1435b2519d06d9914a6
2006-11-10 15:25:03 -05:00
Gabe Black
cee4d1c113 Touched up faults, and made POR actually do something.
--HG--
extra : convert_revision : 38951352edbfc423fb6767a9aac49a703578c0ac
2006-11-10 15:24:10 -05:00