Bobby R. Bruce
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d11c40dcac
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misc: Run pre-commit run --all-files
This ensures `isort` is applied to all files in the repo.
Change-Id: Ib7ced1c924ef1639542bf0d1a01c5737f6ba43e9
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2023-11-29 22:06:41 -08:00 |
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Bobby R. Bruce
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787204c92d
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python: Apply Black formatter to Python files
The command executed was `black src configs tests util`.
Change-Id: I8dfaa6ab04658fea37618127d6ac19270028d771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47024
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
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2022-08-03 09:10:41 +00:00 |
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Giacomo Travaglini
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ee8279b719
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arch-arm: Add DVM enabled flag in the Decoder class
This is needed as the decoder needs to choose whether to
instantiate a DVM (treated as IsLoad) instruction when
decoding a TLBI/DSB Shareable, or to issue a simple system
instruction in case DVM messages are not modelled in the
simulated system.
JIRA: https://gem5.atlassian.net/browse/GEM5-1097
Change-Id: I9f46304dee63851caec809a5c6b8e796d684cc05
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56603
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
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2022-03-15 16:19:10 +00:00 |
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Gabe Black
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25d36c81c9
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arch,cpu: Turn the Decoder objects into SimObjects.
Change-Id: I85839880db588b3b92064b8fcbf053c1811a1fdc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52080
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
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2021-12-06 03:09:22 +00:00 |
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