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2514 Commits

Author SHA1 Message Date
Gabe Black
135595a4d7 mem: Eliminate the now unused GENERIC_IPR request flag. 
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187

Change-Id: Id3aaffa4fa88032fd209c5c3b6f67283a6af1c48
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23187
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Muhammad Sarmad Saeed <mssaeed@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
 2020-02-11 11:58:57 +00:00
Daniel R. Carvalho
7515106ebe mem-cache,mem-ruby: Move WeightedLRU RP 
Move the WeightedLRUReplacementPolicy to the replacement policies folder.

Change-Id: I9902faefb6de33343bb65f994be70bd9e1dd4e14
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22445
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: John Alsop <johnathan.alsop@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
 2020-02-10 12:40:18 +00:00
Gabe Black
d63743699b mem: Make slicc generate some default methods explicitly. 
Implicitly using the default copy constructor and assignment operator
is apparently deprecated, and gcc 9 will warn about it, breaking the
build.

Change-Id: Ida7a8a577e9d1cde9841eac7eee1af74563f1e27
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24927
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com>
Reviewed-by: John Alsop <johnathan.alsop@amd.com>
Maintainer: Bradford Beckmann <brad.beckmann@amd.com>
 2020-01-31 09:03:42 +00:00
Daniel R. Carvalho
519808c02f mem-cache: Fix invalidation of prefetchers 
Add an invalidation function to the AssociativeSet, so that entries
can be properly invalidated by also invalidating their replacement
data.

Both setInvalid and reset have been merged into invalidate to
indicate users that they are using an incorrect approach by
generating compilation errors, and to match CacheBlk's naming
convention.

Change-Id: I568076a3b5adda8b1311d9498b086c0dab457a14
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24529
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-01-21 08:07:05 +00:00
Daniel R. Carvalho
54a27b007a mem-cache: Add print function to ReplaceableEntry 
Add a basic print function to acquire and display information about
replaceable entries.

Change-Id: I9640113d305fbe086c5bfaf8928a911bfcac50bb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23567
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
 2020-01-17 20:41:50 +00:00
Daniel R. Carvalho
6eabbd49eb mem-cache: Add getter for the number of valid sub-blks 
Add a getter function so that the number of valid sub-blocks can be
retrieved. As a side effect, make the respective counter private.

Change-Id: Icef8b51164c8e165872dcaebc65f5c330f16cb29
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22605
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2020-01-17 20:41:39 +00:00
Daniel R. Carvalho
62dfa5a1fb mem-cache: Add multiple eviction stats 
Add stats to inform how many blocks were evicted due to a sector
replacement/eviction.

Change-Id: I886365506016d0888f835d182b3b65a808a9dccd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22606
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
37bcb128fa mem-cache: Make findVictim non-const 
In order to acquire stats when a victim is found,
findVictim must be made const.

Change-Id: I493c7849f07625c90b2b95fd220f50751f4d0f52
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22604
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
7ff32d7b53 mem-cache: Add more compression stats 
Add stats to calculate the total number of compressions, decompressions
and the average compression size, in number of bits.

Change-Id: I5eb563856c1ff54216e1edcd2886332b7481cbfe
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22609
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
7dce9e3782 mem-cache: Factor out multiple block eviction 
Create a function to try to evict multiple blocks while checking for
transient state.

Change-Id: I6a879fa5e793cd92c4bdf4a258a133de4c865012
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22607
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2020-01-17 16:31:03 +00:00
Daniel R. Carvalho
aa5140e26e mem-garnet: Use smart pointers for CrossbarSwitch's members 
Use smart pointers for the pointers managed by CrossbarSwitch.

Change-Id: I71958c72cde5981d730aa3f68bba0ffbe4c2506f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24244
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-01-14 07:04:57 +00:00
Giacomo Travaglini
b653e5ea10 base: Move AtomicOpFunctors to a dedicated header 
src/base/types.hh file definition is:

/**
 * @file
 * Defines global host-dependent types:
 * Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
 */

I feel AtomicOpFunctor doesn't fall in this cathegory so I am
moving those into a dedicated header: base/amo.hh

Change-Id: I8f05fb0944c03e4053cfaf2ffe65cac803df1d93
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23563
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-01-08 09:32:08 +00:00
Nikos Nikoleris
2430be2edb mem-cache: Forward snoops when the cache is not responding 
When the MSHR is handling a request that will make the block dirty the
current cache commits respond. When that's not the case the cache
should forward any snoops. This CL fixes MSHR::handleSnoop() to
implement this behavior.

Change-Id: I207e3ca4968fd9528fd4cdbfb3eb95f470b4744d
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23668
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
 2020-01-07 09:42:01 +00:00
Nikos Nikoleris
96e8f2ed3c mem-cache: Ensure that responses get data from the right source 
This CL makes sure that we use the right source for data for
responses after a response from the cache below.

Change-Id: I7329f3e6bcb7ce2054e912eb9dea48c9d169d45a
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23667
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-01-07 09:42:01 +00:00
Nikos Nikoleris
44e3c95555 mem-cache: Avoid write merging if there are reads in between 
This CL reworks the logic in the MSHR to make sure we do not coalesce
requests unless there is a series of write requests for the whole
cache block without any other incompatible requests (e.g., read) in
between.

Change-Id: I0b3195858fb33ef85d7aae27376506057dd53ea7
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23666
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
 2020-01-06 11:09:21 +00:00
Daniel R. Carvalho
05156e6730 mem: Encapsulate mapping gem5 to host address space 
Create a function to encapsulate mapping an address in gem5's
address space to the host's address space. The returned value can
be used to access the contents of the given address.

As a side effect, make the local variable hostAddr use snake_case
to comply with gem5's coding style.

Change-Id: I2445d3ab4c7ce5746182b307c26cbafc68aa139c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22610
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-12-12 14:43:09 +00:00
Daniel R. Carvalho
a87a3e4fad mem-cache: Move unused prefetches counter update 
The number of unused prefetches should be updated every time
a block is invalidated, therefore we move the update to within
the corresponding function.

Change-Id: If3ac2ea43611525bd3c36d628d88382042fcb7dc
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18908
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2019-12-12 14:43:09 +00:00
Giacomo Travaglini
bc26c0dd35 mem: Add Request::isMasked to check for byte strobing 
This is trying to overcome the following problem: At the moment a memory
request with a non empty byteEnable mask will be considered masking even
if all elements in the vector are true.

Change-Id: I16ae2c0ea8c3f3370e397bab9d79d6d60c3784bd
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23284
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-12-09 13:18:48 +00:00
Giacomo Travaglini
8a1f195c2b mem: Add byteEnable copy to Request copy constructor 
Change-Id: Ie97543e62524bb244ae65eef096411af4605c175
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23283
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-12-09 13:18:48 +00:00
Gabe Black
078bdc8661 mem-cache: Avoid hiding a virtual method in the dictionary compressor. 
The non-virtual version is later used in overrides of the virtual
version whcih takes more arguments.

Change-Id: I102d1185c7a616337c2a0429daa998706189292f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23127
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-11-28 07:14:57 +00:00
Gabe Black
6ff7e6db89 mem-cache: Remove a std::move clang says is unnecessary. 
It also says it prevents an optimization.

Change-Id: I9c21dc1a0c53cf70cefd1400564de07d1e845a75
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23124
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-11-28 07:14:36 +00:00
Isaac Sánchez Barrera
7e19b26f50 mem-cache: Initialize all members of QueuedPrefetcher::DeferredPacket. 
Members `tc` and `ongoingTranslation` were uninitialized in the constructor for
`QueuedPrefetcher::DeferredPacket`. If `ongoingTranslation` is not initialized to
`false` by default, some translation requests from queued prefetchers are not
properly handled and executions are nondeterministic.

Change-Id: Ia278f9e74847d6b847984d47f6a45643bae57794
Signed-off-by: Isaac Sánchez Barrera <isaac.sanchez@bsc.es>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22844
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-11-18 11:10:21 +00:00
Isaac Sánchez Barrera
ccb3c75fab mem-cache: Fix destructor of BasePrefetcher::PrefetchInfo. 
The destructor of `BasePrefetcher::PrefetchInfo` was calling `delete` for a
dynamically-allocated array. Changed to `delete[]` to remove potential undefined
behaviour.

Change-Id: I6f531bfb6fb7108f1d3e743ae0384d80173e15ef
Signed-off-by: Isaac Sánchez Barrera <isaac.sanchez@bsc.es>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22843
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-11-18 11:10:21 +00:00
Polydoros Petrakis
75a127e8ba mem-ruby: Reset Ruby Sequencer Outstanding Requests stats 
Change-Id: I14b106e0eb7abd9c14badeedf35d6d1c9f198f98
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22446
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-11-05 12:28:24 +00:00
Daniel R. Carvalho
0a276fb4bb mem-cache: Modify compressor to appease newer compilers 
The type of the local unique_ptr variable was different from the return type.

In C++11 because of such difference, a copy-ellision would not be possible,
and that required the use of a std::move.

In C++14 the restriction of same types being required was removed, so
std::move would not be needed anymore.

With the addition of the -Wredundant-move warning in newer compilers, having
the std::move on the return became an issue, breaking compilation.

Change-Id: I45d18dfc500bb5db5fe360814feb91853c735a19
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22403
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
b7223e0976 mem-cache: Implement a perfect compressor 
Implement a perfect compressor that always manages to compresses data
exactly to its maximum allowed compression ratio. This allows tracking
a compression upper bound.

Change-Id: Ibc68bf2dc84b75207795d5ba6304b9ed6dbeae8f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21160
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
3029ef270c mem-cache: Make BDI a multi compressor 
BDI is a compressor containing multiple sub-compressors.

Change-Id: I98411e2ef9dcc2182801a172dfc59ed7a8ee7dd4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21159
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
b8a4a911ee mem-cache: Implement a multi compressor 
Implement a compressor that contains multiple sub-compressors and
choses the one that provides the best compression results for each
compression.

Change-Id: I758cf67c84bd85edbea16b2a07b2068b00454461
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21158
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
2cb1449ede mem-cache: Implement BDI sub-compressors 
Implement sub-compressors of BDI as public compressors so that
they can be used separately.

Change-Id: I710e35f39f4abb82fd02fd33b1b86a3f214c12cb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21157
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
e415882972 mem-cache: Implement a repeated values compressor 
The repeated values compressor can only compress data composed solely
repeated instances of the same value.

Change-Id: If2c4f47ad4af492d202ec2017e30ba52ee67e307
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21156
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
fcc1964453 mem-cache: Implement a zero compressor 
The zero compressor can only compress data composed solely of zero
bits.

Change-Id: I8b359c03776a8748abd144a178bda944b5a1b766
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21155
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-11-04 21:32:22 +00:00
Daniel R. Carvalho
93b4845ed2 mem-cache: Implement FPC-D cache compression 
Implementation of Frequent Pattern Compression with limited Dictionary
support (FPC-D) cache compressor, as described in "Opportunistic
Compression for Direct-Mapped DRAM Caches", by Alameldeen et al.

Change-Id: I26cc1646f95400b6a006f89754f6b2952f5b4aeb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21154
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-11-04 21:32:22 +00:00
Gabe Black
5fa59a2831 mem: Delete the packet accessors which use guest endianness. 
These accessors create an extra dependency on the guest OS, and can be
avoided. Now that all their uses have been removed, they aren't needed
any more.

Change-Id: I466c07fef99bce2d7964c07a7ac3dd398691378b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/13465
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
 2019-11-01 23:41:14 +00:00
Daniel R. Carvalho
fc0678daf2 mem-cache: Fix missing header in associative set 
Add missing intmath header to AssociativeSet, so that isPowerOf2 can
be used.

error: there are no arguments to 'isPowerOf2' that depend on a template
parameter, so a declaration of 'isPowerOf2' must be available

Change-Id: Ib2b194f9e71284ee439786bdb76d99858e57e2f5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22444
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-31 19:00:08 +00:00
Joe Gross
bb94296373 mem-ruby: Fixed pipeline squashes caused by aliased requests 
This patch was created by Bihn Pham during his internship at AMD.

This patch fixes a very significant performance bug when using the O3
CPU model and Ruby. The issue was Ruby returned false when it received
a request to the same address that already has an outstanding request or
when the memory is blocked. As a result, O3 unnecessary squashed the
pipeline and re-executed instructions. This fix merges readRequestTable
and writeRequestTable in Sequencer into a single request table that
keeps track of all requests and allows multiple outstanding requests to
the same address. This prevents O3 from squashing the pipeline.

Change-Id: If934d57b4736861e342de0ab18be4feec464273d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21219
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-31 18:42:04 +00:00
Daniel R. Carvalho
248c8d36ec mem-cache: Add a repeated value pattern to compressors 
The repeated value pattern checks if values are composed of multiple
instances of the same value. If successful, the bits of the repeated
value are included only once in the compressed data.

Change-Id: Ia7045b4e33a91fd8d712fe1ca689f7f8cb4e5feb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21153
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
7244788c02 mem-cache: Inform unused bits instead of bytes in compressor pattern 
Increase pattern precision by giving the number of unmatched bits
instead of bytes.

Change-Id: I5efbe9c31672cc973b4c89c741cdc8cc28d26285
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21152
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
2dd82da9b8 mem-cache: Add a masked const value pattern to compressors 
The masked pattern compares values to masked const non-dictionary values
to determine whether these match. If successful, the bits that do not
match must be added to the compressed data.

Change-Id: I4c53568694dab916136fe384cb2ee10e554f7136
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21151
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
83219d89de mem-cache: Add a masked pattern to compressors 
The masked pattern compares masked values to masked dictionary entries
to determine whether these values match. If successful, the bits that
do not match must be added to the compressed data.

Change-Id: I4b1c8feb0faa99576382b54a73a20c353f965d2a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21150
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
7973e49187 mem-cache: Add an uncompressed pattern to compressors 
The uncompressed pattern always stores the original data, and therefore
it is always successful. All of the derived classes of the dictionary
compressor must have this pattern as the last pattern of the pattern
factory.

Change-Id: I2a38fd56630d88ef8b918220dc4c2824a196a8a2
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21149
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
7a8debf0fa mem-cache: Templatize DictionaryCompressor 
Templatize DictionaryCompressor so that the dictionary entries' sizes
can be changed.

Change-Id: I3d89e3c692a721cefcd7e3c55d2ccdefa425f614
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21148
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
7ce9fe0af9 mem-cache: Factor out CPack's dictionary functionality 
Factor out dictionary functionality of CPack, so that it can be
used easily for other compressors.

As a side effect, create an addToDictionary function to allow
subclasses to chose how to handle insertion.

Change-Id: I02fae4e98b02db5a40467ec470b71020d5e867cb
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21147
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
70dc35a659 mem-cache: Use shouldAllocate() instead of CPack's decompress() 
Split decompression functionality using the proper function to
determine if a dictionary entry should be allocated after
decompression or not.

Change-Id: I4995304f4c4508c03c9fc1685f04511622969556
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21146
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
b42971dabd mem-cache: Limit compression size 
Add a threshold so that if the compressed size is greater than it,
the compression is abandoned, and the data is considered uncompressible.

Change-Id: Ic416195b06ec440a40263b75bd0f0383cde2ea6a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21144
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
 2019-10-29 21:32:02 +00:00
Daniel R. Carvalho
0c5ef2d999 mem-cache: Do not try to compress dataless packets 
Fix filling blocks so that packets that do not contain data do not
generate a compression attempt. This can happen, for example, with
invalidation responses, which will trigger a packet data access
assertion.

Change-Id: I2a1e7983657f6e5e770b148ab62c9de9ac3986ac
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22164
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 21:32:02 +00:00
Nikos Nikoleris
39220ef368 mem: Fix DRAM controller to operate on its own address space 
Typically, a memory controller is assigned an address range of the
form [start, end). This address range might be interleaved and
therefore only a non-continuous subset of the addresses in the address
range is handed by this controller.

Prior to this patch, the DRAM controller was unaware of the
interleaving and as a result the address range could affect the
mapping of addresses to DRAM ranks, rows and columns. This patch
changes the DRAM controller, to transform the input address to a
continuous range of the form [0, size). As a result the DRAM
controller always operates on a dense and continuous address range
regardlesss of the system configuration.

Change-Id: I7d273a630928421d1854658c9bb0ab34e9360851
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19328
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Wendy Elsasser <wendy.elsasser@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 09:48:10 +00:00
Nikos Nikoleris
12cf816745 mem-cache: Avoid promotion of incompatible deferred targets 
Often a request that hits on an MSHR has to be deferred as it can't be
serviced by the current response.

For example, a request that requires writable has to be deferred when
the response is expected to bring in a read-only copy of the
block. However, there are cases where the response, although not
expected to do so, brings a writable copy and as a result we also
service deferred targets. In such cases, we promote deferred targets
up until the first that can't be serviced by the current response
(e.g., cache maintainance operation). If the first deferred target is
incompatible we don't promote any targets at all.

Change-Id: Ib3e13be51120b7c0f0053b83b76bde03e1b7dd4e
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22127
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
 2019-10-29 09:41:41 +00:00
Nikos Nikoleris
e0de180ee4 mem-cache: Fix MSHR whole line write tracking 
The MSHR keeps track of outstanding writes and services them as a
whole line write whenever possible. To do this the outstanding writes
have to be compatible (e.g., not strictly ordered). Prior to this
change, due to this tracking mechanism, the MSHR would not service a
WriteLineReq with flags that do not allow merging as a full line write
even if it was the first target triggering an assertion. This
changeset fixes this bug.

Change-Id: I2cbf5ece0c108c1fcfe6855e8f194408d5ab8ce2
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22126
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-29 09:41:41 +00:00
Gabe Black
85e7a59cf0 mem: Delete the MessageReq and MessageResp memory commands. 
Now that Message*Port is gone, there are no users of these two memory
commands. They can now be deleted, simplifying the memory system
slightly.

Change-Id: If157dade4a3fb2610756c2ee81dc0c3fac670a26
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20824
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2019-10-18 01:43:55 +00:00
Mingyuan
aae1ec8a90 mem-cache: set the second chance to false when inserting a block 
Modify second chance replacement policy so that entries are inserted
without a second chance. Previously, the second chance bit was set
to true when a cache line was inserted. So the cache line would gain
its second chance when inserting. This is wrong because the cache
block will only get a second chance when it hits.

Here's a quoted citation for the second chance replacement policy:
"Whenever the algorithm examines a  page entry, it extracts the associated
usage bit and enters it into the high-order position of a k-bit shift
register after shifting the contents of the register one bit-position
lower. Then if the shift register is nonzero, the page is retained; if the
shift register is zero, the page is replaced by the new page. In either
case the usage bit for the page is turned off and the circular list
pointer is advanced."
(A Paging Experiment with the Multics System, FJ Corbato, 1968)

Change-Id: I0d07e56aa16c67dd36e0d490c3f457f91e46f320
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20882
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
 2019-10-13 16:41:33 +00:00