Commit Graph

10252 Commits

Author SHA1 Message Date
Gabe Black
cd69bb5041 arch,sim: Merge Process::syscall and Process::getDesc.
When handling a system call, external code would call Process::syscall
which would extract the syscall number, that would call the base
class' doSyscall method, that would call into the subclass' getDesc
to get the appropriate descriptor, and then doSyscall would check
that a syscall was found and call into it.

Instead, we can just make the SyscallDescTable optionally check for
missing syscalls (in case we want to check multiple tables), and
make syscall look up the appropriate descriptor and call it. The base
implementation of syscall would then do the only bit of doSyscall that
is no longer being handled, incrementing the numSyscalls stat.

Change-Id: If102c156830ed2997d177dc6937cc85dddadf3f9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24119
Tested-by: kokoro <noreply+kokoro@google.com>
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-03-20 10:04:18 +00:00
Gabe Black
a63b853320 arch,sim: Drop the syscall number from the syscall func signature.
This value is almost never used, and is now part of the SyscallDesc.

Change-Id: Ia4ffc19774bb2eac8f29134e3765c06a264407b6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24118
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-20 10:04:18 +00:00
Gabe Black
ab8d484c27 arch,sim: Create a common structure to hold syscall tables.
Also add the syscall number into the SyscallDesc class.

The common table structure is basically just a map that extracts its
key value from the SyscallDesc class using a new num() accessor. By
using a map instead of an array (like RISCV was already doing), it's
easy to support gaps of arbitrary size and non-zero offsets of groups
of system calls without lots of filler or additional logic. This
simplified the ARM system call tables in particular which had a lot
of filler entries.

Also, both the 32 and 64 bit ARM syscall tables had entries for a
syscall at 123456 which was the "Angel SWI system call". This value
is actually the immediate constant passed to the SWI system call
instruction and is not interpreted as the system call number in linux.
This constant can be intercepted by hardware or a simulator to, for
instance, implement ARM semihosting.

Also, that constant in combination with the SWI instruction is only
used for semihosting in 32 bit ARM mode, not in 64 bit mode or in
thumb.

Since checking for that system call number was very likely a mistake
from misinterpreting how the semihosting calls work, this change
drops those checks.

Change-Id: I9b2a902d7326791449cf0e1b98e932dcadba54f7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24117
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-20 10:04:18 +00:00
Gabe Black
db7f6a5fa8 sim: Get rid of the Arguments class.
This class read arguments using the arch specific getArgument function
and then presented the arguments as an array. The problem with that
approach is that it's not possible to tell where different arguments
are without knowing the types of previous arguments, and not all
arguments can be simply represented as a native sized integer.

This class has been phased out and is no longer needed.

Change-Id: Ibb4c529fe8c51fd0ae15ed3b6ea30543ad9c23e0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24115
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-20 10:04:18 +00:00
Timothy Hayes
9f9606fb63 mem-ruby: MESI_Three_level HTML reference generation fix
The SLICC HTML generator does not work without the 'desc' property of
the STATES and EVENTS found in the protocol state machine source files.
This adds the 'desc' property in MESI_Three_Level to declarations where
it was missing and cleans up the text of some existing ones.

Issue-on: https://gem5.atlassian.net/browse/GEM5-357

Change-Id: I2d0f8e11889554063fed798e724217963d4a74de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24256
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2020-03-20 09:39:43 +00:00
Gabe Black
9877dc66ab sparc: Add the AT_RANDOM aux vector to the initial stack.
This is blindly used by at least modern glibc-s

Change-Id: I175ce5f1495e367badf0fab32f5837e3cdfa955a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26824
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-20 05:00:38 +00:00
Gabe Black
cdaf682a57 base: Convert the annotation methods to take actual arguments.
Feed the arguments in from the decoder.

Change-Id: Ie2dcd09320a5de02bb91b8743fc643c446e506e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24114
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-03-20 03:08:43 +00:00
Gabe Black
fe1d103e0e arm,kern: Use GuestABI to call printk from the kernel.
Change-Id: I07b0f1c01f5ec8d6761903fa4aa15b9e8ae35069
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24113
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-03-20 03:08:43 +00:00
Gabe Black
2d142070c5 arm: Use a non-template indexed version of laneView in aapcs32.
The lane number is constant over its lifetime, but is computed with a
variable i which is not a compile time constant. It therefore can't be
used as a template parameter, and should be marked as const and not
constexpr.

Change-Id: Ie0b950311495831d5224a8fb397cf42d5cf5f25b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26834
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-20 03:08:43 +00:00
Giacomo Travaglini
ca748be477 arch-arm: Fix ArmSystem::_resetAddr evalutation
With:

https://gem5-review.googlesource.com/c/public/gem5/+/26466

The ArmSystem reset address (_resetAddr) is always forced by the
workload:

 _resetAddr = workload->entry

So there is no possibility to manually specify a reset address.

This was not the case before:
The resetAddr was forced only if auto_reset_addr was true or if there
was an associated bootloader to the kernel image. In that case even if
auto_reset_addr was false, the reset address was determined by the
bootloader entry.
This was also not ideal (but it was working)

This patch is cleaning all of this:

If you want to have automatic detection (recommended), you would need to
set auto_reset_addr (now turned to true by default).  This will allow to
keep most fs script untouched.  If you don't want to use automatic
detection, set auto_reset_addr to False and provide your own reset
address.

Change-Id: I5d7a55fd9060b9973c7d5b5542bd199950e1073e
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26723
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
2020-03-19 22:36:12 +00:00
Adrian Herrera
21bacc4f92 dev-arm: SMMUv3, single interconnect attachment
The attachment (port binding) of the SMMUv3 master and control
ports is independent of the connection of device masters to it.

This behaviour is now moved from SMMUv3::connect to
RealView::attachSmmu, as it is a responsibility of the Platform
designer.

This fixes crashes when connecting multiple device masters.

Change-Id: If1e8f55d51876fe761f881e3044ffec637c21b09
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26923
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: Gem5 Cloud Project GCB service account <345032938727@cloudbuild.gserviceaccount.com>
2020-03-19 18:18:41 +00:00
Matthew Poremba
1566e47017 sim-se: Implement Virtual Memory Area API
Virtual memory areas are used to track regions of memory which may
change over the course of execution, such as heap, stack, and mmap. It
is a high-level mimicry of Linux' memory management. VMAs are intended
to be used to support lazy allocation of physical pages to valid VMAs
as the virtual addresses are touched. Lazy allocation increases speed
of simulation for SE mode processes which, for example, mmap large
files.

The VMAs can also be queried to generate a map of the process' memory
which is used in some libraries such as pthreads.

This changeset only adds APIs for virtual memory areas. These are used
in a subsequent changeset.

Change-Id: Ibbdce5be79a95e3231d2e1c9ee8f397b4503f0fb
Signed-off-by: Brandon Potter <Brandon.Potter@amd.com>
Signed-off-by: Michael LeBeane <Michael.Lebeane@amd.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25365
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 14:24:19 +00:00
Gabe Black
9edd7357f6 mem: Add a Request::Flags parameter to the translating port proxies.
These flags will be given to the Request object which is used to do the
translation.

Change-Id: I21755f5f9369311e2f2d5be73ebd4f5865f73265
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26623
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-19 07:21:13 +00:00
Gabe Black
1a1b84322b arch,base,cpu,dev,kern,mem,sim: Drop FS from FSTranslatingPortProxy.
This translating proxy can be used in FS, or in SE with a failure
handing case in place.

Change-Id: I2e6421f52529fa833e42f8d3e64d4341c282634f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26551
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-19 07:21:13 +00:00
Gabe Black
7342bccd8d arch,cpu,mem,sim: Reimplement the SE translating proxy using the FS one.
The only functional difference between them was that the SE one might
have optionally fixed up missing translations for demand paging.

This lets us get rid of some code recreating the proxy ports in
setProcessPtr since the SE translating port no longer keeps a copy of
the process object pointer.

Change-Id: Id97df1874f1de138ffd4f2dbb5846dda79d9e4ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26550
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-03-19 07:21:13 +00:00
Gabe Black
8e0e7da5ab sparc: Make translateFunctional ignore alignment and use the page tables.
translateFunctional might be used with unaligned addresses which should
be allowed in that context. Also, in SE mode, if the translation isn't
in the TLB itself, then it should be looked up in the SE mode fake page
tables and not in a page table resident in memory.

Change-Id: Ibb39685cfdcd4eb6cb8a0486a1de014a4e452518
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26831
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:38:01 +00:00
Gabe Black
9d1d264fb6 arch: Eliminate vtophys and its switching header file.
This function is no longer used anywhere in gem5.

Small helper functions which had been put alongside vtophys on ARM and
RISCV were also moved into src/arch/arm/remote_gdb.cc and
src/arch/power/pagetable.hh, the only places they were used.

Change-Id: Iba72f6c4b797a35a785a5bb781d602c943541fa7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26234
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:38:01 +00:00
Gabe Black
7e0f15e1c0 mem: Make the FSTranslatingPortProxy stop using vtophys.
That was the only place vtophys was still being used. Instead, use the
data TLB to translate functional, and if that fails try the the
instruction TLB.

Change-Id: Ie5e1e1b5d470f010e25482d785f111dc4292db60
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26233
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 01:11:21 +00:00
Gabe Black
951650156c arm: Demote PCEvent subclass pointers to PCEvent pointers.
Nothing is actually accessed through these pointers. This simplifies
their declration, and gives more flexibility when setting up those
events.

Change-Id: If857de5c8df37b6ead7eae53e3c0c6c3103938c0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24112
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-03-19 00:50:27 +00:00
Gabe Black
c38298d931 riscv: Implement translateFunctional.
Change-Id: Ibe8adea8f66c7de22ee2ab0da54e866cd05fc257
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26547
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-19 00:50:10 +00:00
Gabe Black
e387833613 arch,kern: Rename some function events to have better names.
Rename many of the Event classes to have more succinct or
consistent names, and fix various style issues.

Change-Id: Ib322da31d81e7a245a00d21786c2aa417c9f2cde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26703
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-18 02:11:33 +00:00
Boris Shingarov
bdfbd9b9bc base: Do not treat addresses < 10 specially
The RSP stub (base/remote_gdb.cc) treats virtual addresses below 0x000A as
meaning "the address used in the previous m-packet".  This leads to nasty
surprises, and is not justified by neither the RSP protocol documentation
nor other existing RSP implementations.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-407

Change-Id: I5fccc10a58d9af856eeee6d45418905c0f47ffab
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26605
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
2020-03-18 00:07:28 +00:00
Gabe Black
309b303240 kern,arch: Refactor SkipFuncEvent to not use skipFunction.
Replace it with a new virtual function.

Change-Id: I9d516d21ab3b1d1d70ea1297f984f868d3e7c3fb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24111
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 06:53:00 +00:00
Gabe Black
45829cfe00 x86: Implement translateFunctional.
This function is based off of vtophys in the full system case, and off
of the page table fill mechanism used in SE mode. It ignores what's
already in the TLB, and also ignores protection mechanisms.

This may need to be reworked in the future if, for instance, pages
still resident in the TLB but not in the page tables need to be
considered, but it should work at least for the time being.

Change-Id: If21701ca36a30805f4199312933a8afc91f20501
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26405
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-17 01:08:01 +00:00
Daniel R. Carvalho
7539c69c4e mem-garnet: Use static allocation in CrossbarSwitch
There is no need to dynamically allocate these variables.

Change-Id: I6efeaffe75f2b4ba706c26d2a12c42c07dc7c7ee
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24983
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
f5f523ed26 mem-garnet: Use smart pointers in Router's members
Use smart pointers for the pointers managed by Router, and do
static allocation when possible.

Change-Id: I5fad8b2d17ac7950d478d37000ac80a4d2f68b15
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24248
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
21e12a0d0e mem-garnet: Use static allocation in Switch
Make pointers non pointers when possible.

Change-Id: I272387c2ac1fd77deef06feb637127e232910e30
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24250
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
c2ae0ba0c4 mem-garnet: Use static allocation in NetworkLink
Use static allocation to manage NetworkLink's pointers.

Change-Id: I3ab22b1f912f0119448f9013fd0dfff9bf5a6999
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24252
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
5fce5056fd mem-garnet: Use static allocation in NetworkInterface
Use static allocation for the pointers managed by NetworkInterface.

Change-Id: Ib97d95165337659f92cb8a078020692baae5b5ca
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24247
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
0fa704526d mem-garnet: Use static allocation in InputUnit
Use static allocation for the pointers managed by InputUnit.

Change-Id: I3eab42c6c08b1a519b9b55de26e820bad2ef03c4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24245
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
f545497057 mem-garnet: Use static allocation in OutputUnit
Use static allocation for the pointers created by OutputUnit.

Change-Id: Ica4fd5d4994078764769702311520c9daf8dba72
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24243
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
f378fd5a70 mem-garnet: Use static allocation in VirtualChannel
The input buffer does not need to be dynamically allocated.

Change-Id: Ice64f40d2a7e16af325ddb6803e34b3eed2e99db
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24253
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
27f915e4d9 mem-garnet: Remove delete of param pointers of SimpleNetwork
All over gem5 the params pointers are not deleted within the classes
that they were created for. Although this is a potential memory leak
as of now, it is probably safer to follow general convention so that
it can be fixed at once in the future.

Change-Id: If96f04058d51513fa8763610880e5524785ee9cf
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24249
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
e23ce9bc73 mem-garnet: Remove delete of param pointers of GarnetNetwork
All over gem5 the params pointers are not deleted within the classes
that they were created for. Although this is a potential memory leak
as of now, it is probably safer to follow general convention so that
it can be fixed at once in the future.

Change-Id: I74b662a8e635cdfb4dc1eae732dd114659fab2e9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24246
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:23:16 +00:00
Daniel R. Carvalho
d8e7d6bcb9 base: Add static assert to trie
Trie is based on the condition that they key is an integral. As so,
add a static_assert to guarantee that. Also, added some general info
about tries to the class.

Change-Id: Idc18f6a685db8047cd44b791f427666d3dd2d187
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26784
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:22:07 +00:00
Gabe Black
6bc9572914 x86: Hook up pread64 in 32/64 bit linux, and pwrite64 in 32 bit.
My new computer has a dynamic linker which seems to use the pread64
system call, and since that gets pulled in when running tests, that
needs to be implemented for tests to pass on that machine, making it
possible to detect problems the failure might ohterwise mask.

This is only really necessary for 64 bit linux, but while I'm here I
hooked it up for 32 bit linux as well. I also added pwrite64 for 32 bit
linux since that was only enabled for 64 bit.

Change-Id: I8d2061d30e98a1581c5e30b522b6ba12aea20ecd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26604
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 22:03:43 +00:00
Gabe Black
0fedeb873d sim: Provide an implementation for the pread64 system call.
This implementation is very similar to the pwrite64 system call, just
with data going the other direction as you'd expect.

Change-Id: I4f8ec9d83bf2339f9c84e31f25309c58e6157304
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26603
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 21:57:01 +00:00
Giacomo Travaglini
2f350b822a power: Fix regStats for PowerModel and PowerModelState
Every Stats::Group need to call the parent regStats to
make sure that the base Stats::Group::regStats() gets
called

JIRA: https://gem5.atlassian.net/projects/GEM5/issues/GEM5-319

Change-Id: I931941d8ec5f375f7e51e719d43ae31af095f661
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26643
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-16 08:50:24 +00:00
Giacomo Travaglini
6dcafbfa5d arch-x86: Add Python 3 workarounds for long
Python 3 doesn't have a separate long type. Make long an alias for int
where needed to maintain compatibility.

This is aligning with https://gem5-review.googlesource.com/c/15988

Change-Id: I20e52d7f796d143534fa7dabeb6ff0ae8b62fd2b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26257
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
663495f3b1 arch-x86: Fix imports for Python 3 compatibility
Change-Id: I7e486a6f3d38af54ac1eff431ca40a5af29e3ca7
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26256
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
47cb25b30e arch: list.sort() sorting by key only in python3
list.sort() no longer accept a comparison function. Use the key argument
instead for key based sorting.

Change-Id: I2af2732628721faee3870af0d53c1267839896da
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26254
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
5a48087df9 dev-arm: Fix VExpressFastmodel.py indentation
Convert TAB with four spaces

Change-Id: I7472a01423953c68aed60b37f56fe86eca249fac
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26253
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
30303805a8 arch: Convert exec keyword to exec() function
The function syntax was also accepted in 2.x

Change-Id: I3d9bef3ddcd5e98ff589796d21dbfeb9796bff1d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26252
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
39df0e4f32 arch: Bring closure out of p_global_let
The python interpreter might complain when exec() (the function, not the
python2 keyword) is used in a function and the function contains a nested
block.

See: https://www.python.org/dev/peps/pep-0227/

The patch is moving the nested function out of p_global_let.

Change-Id: Idb3a08a8cd42455af1e5ec2c3ec8f8a1438047d3
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26303
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
1bf2821ae7 misc: Make exception handling python3 compliant
Change-Id: I37d0e97e9762e21c7a0ad315cf7684a19119b5b4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26251
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
e06ec8c423 misc: Text vs Byte string in python3
Python 3 uses the concepts of two different types:
text and binary strings.
Those cannot be implicilty combined (as it was happening in python2) and
in order to be used together one of them must be converted to the other
type:

* Text can be encoded into Bytes via the encode() method
* Bytes can be decoded to Text using the decode() method

By default encode/decode will assume UTF-8 format

JIRA: https://gem5.atlassian.net/browse/GEM5-345

Change-Id: I1bdf7db17b49cc109239fd5f44791769370853f8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26250
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
bb95aa14c6 scons: file removed from python3
Change-Id: I95794fec5cc9c6e72c9ae53f586052be71436c87
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26249
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2020-03-13 14:24:07 +00:00
Giacomo Travaglini
10b4842407 misc: Views and Iterators instead of Lists in python3
* dict methods dict.keys(), dict.items() and dict.values()
return "views" instead of lists

* The dict.iterkeys(), dict.iteritems() and dict.itervalues()
methods are no longer supported.

* map() and filter() return iterators.

* range() now behaves like xrange() used to behave, except it works with
values of arbitrary size. The latter no longer exists.

* zip() now returns an iterator.

Change-Id: Id480018239db88d7f5d60588c93719056de4a0c0
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26248
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 14:24:07 +00:00
Yu-hsin Wang
e9fea79dfc dev-arm: Fix setupBootloader for VExpressFastmodel
Previous fix setupBootloader for VExpress_GEM5_V2 didn't include
VExpressFastmodel. Fix it.

Change-Id: Ia720978848660be63bb788ffaf84b60a5b1b5db5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26684
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 14:04:14 +00:00
Giacomo Travaglini
f3740b3bf9 arch-arm: Fix Arch detection in FS if there is not bootloader
In case a workload is run with no bootloader we still want to be able
to provide the simulation with the correct arch version.
Without this patch every baremetal simulation will default to AArch64, which
is the default value of ArmFsWorkload.

Change-Id: I0f766167d8983cafc1fd30d054862339eb21f73f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26606
Reviewed-by: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-03-13 10:26:53 +00:00