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Author	SHA1	Message	Date
Gabe Black	6687265fe2	cpu: Delete authors lists from the cpu directory. Change-Id: Icfba8e23b5f6820a6ddefe1a50abbe5f8825b7b5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25444 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>	2020-02-17 21:51:23 +00:00
Andreas Sandberg	dbfd6effe0	kvm, arm, dev: Add an in-kernel GIC implementation This changeset adds a GIC implementation that uses the kernel's built-in support for simulating the interrupt controller. Since there is currently no support for state transfer between gem5 and the kernel, the device model does not support serialization and CPU switching (which would require switching to a gem5-simulated GIC).	2015-06-01 19:44:17 +01:00

Author

SHA1

Message

Date

Gabe Black

6687265fe2

cpu: Delete authors lists from the cpu directory.

Change-Id: Icfba8e23b5f6820a6ddefe1a50abbe5f8825b7b5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25444
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>

2020-02-17 21:51:23 +00:00

Andreas Sandberg

dbfd6effe0

kvm, arm, dev: Add an in-kernel GIC implementation

This changeset adds a GIC implementation that uses the kernel's
built-in support for simulating the interrupt controller. Since there
is currently no support for state transfer between gem5 and the
kernel, the device model does not support serialization and CPU
switching (which would require switching to a gem5-simulated GIC).

2015-06-01 19:44:17 +01:00

2 Commits