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Factor code out of main.cc and main.i into a bunch of files

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so things are organized in a more sensible manner.  Take apart
finalInit and expose the individual functions which are now
called from python.  Make checkpointing a bit easier to use.

--HG--
extra : convert_revision : f470ddabbb47103e7b4734ef753c40089f2dcd9d
This commit is contained in:
Nathan Binkert
2007-03-02 22:24:00 -08:00
parent 4e8d2d1593
commit ffe6bebb05
20 changed files with 857 additions and 392 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/python/m5/SimObject.py
View File

@@ -693,7 +693,7 @@ class SimObject(object):
def getCCObject(self):
if not self._ccObject:
self._ccObject = -1 # flag to catch cycles in recursion
self._ccObject = internal.main.createSimObject(self.path())
self._ccObject = internal.sim_object.createSimObject(self.path())
elif self._ccObject == -1:
raise RuntimeError, "%s: recursive call to getCCObject()" \
% self.path()
@@ -727,13 +727,13 @@ class SimObject(object):
# i don't know if there's a better way to do this - calling
# setMemoryMode directly from self._ccObject results in calling
# SimObject::setMemoryMode, not the System::setMemoryMode
system_ptr = internal.main.convertToSystemPtr(self._ccObject)
system_ptr = internal.sim_object.convertToSystemPtr(self._ccObject)
system_ptr.setMemoryMode(mode)
for child in self._children.itervalues():
child.changeTiming(mode)
def takeOverFrom(self, old_cpu):
cpu_ptr = internal.main.convertToBaseCPUPtr(old_cpu._ccObject)
cpu_ptr = internal.sim_object.convertToBaseCPUPtr(old_cpu._ccObject)
self._ccObject.takeOverFrom(cpu_ptr)
# generate output file for 'dot' to display as a pretty graph.

95
src/python/m5/__init__.py
View File

@@ -27,14 +27,16 @@
# Authors: Nathan Binkert
# Steve Reinhardt
import atexit, os, sys
import atexit
import os
import sys
# import the SWIG-wrapped main C++ functions
import internal
# import a few SWIG-wrapped items (those that are likely to be used
# directly by user scripts) completely into this module for
# convenience
from internal.main import simulate, SimLoopExitEvent
from internal.event import SimLoopExitEvent
# import the m5 compile options
import defines
@@ -85,27 +87,60 @@ def instantiate(root):
root.print_ini()
sys.stdout.close() # close config.ini
sys.stdout = sys.__stdout__ # restore to original
internal.main.loadIniFile(resolveSimObject) # load config.ini into C++
# load config.ini into C++
internal.core.loadIniFile(resolveSimObject)
# Initialize the global statistics
internal.stats.initSimStats()
root.createCCObject()
root.connectPorts()
internal.main.finalInit()
noDot = True # temporary until we fix dot
if not noDot:
dot = pydot.Dot()
instance.outputDot(dot)
dot.orientation = "portrait"
dot.size = "8.5,11"
dot.ranksep="equally"
dot.rank="samerank"
dot.write("config.dot")
dot.write_ps("config.ps")
# Do a second pass to finish initializing the sim objects
internal.sim_object.initAll()
# Do a third pass to initialize statistics
internal.sim_object.regAllStats()
# Check to make sure that the stats package is properly initialized
internal.stats.check()
# Reset to put the stats in a consistent state.
internal.stats.reset()
def doDot(root):
dot = pydot.Dot()
instance.outputDot(dot)
dot.orientation = "portrait"
dot.size = "8.5,11"
dot.ranksep="equally"
dot.rank="samerank"
dot.write("config.dot")
dot.write_ps("config.ps")
need_resume = []
need_startup = True
def simulate(*args, **kwargs):
global need_resume, need_startup
if need_startup:
internal.core.SimStartup()
need_startup = False
for root in need_resume:
resume(root)
need_resume = []
return internal.event.simulate(*args, **kwargs)
# Export curTick to user script.
def curTick():
return internal.main.cvar.curTick
return internal.event.cvar.curTick
# register our C++ exit callback function with Python
atexit.register(internal.main.doExitCleanup)
atexit.register(internal.core.doExitCleanup)
atexit.register(internal.stats.dump)
# This loops until all objects have been fully drained.
def doDrain(root):
@@ -119,7 +154,7 @@ def doDrain(root):
# be drained.
def drain(root):
all_drained = False
drain_event = internal.main.createCountedDrain()
drain_event = internal.event.createCountedDrain()
unready_objects = root.startDrain(drain_event, True)
# If we've got some objects that can't drain immediately, then simulate
if unready_objects > 0:
@@ -127,7 +162,7 @@ def drain(root):
simulate()
else:
all_drained = True
internal.main.cleanupCountedDrain(drain_event)
internal.event.cleanupCountedDrain(drain_event)
return all_drained
def resume(root):
@@ -135,16 +170,16 @@ def resume(root):
def checkpoint(root, dir):
if not isinstance(root, objects.Root):
raise TypeError, "Object is not a root object. Checkpoint must be called on a root object."
raise TypeError, "Checkpoint must be called on a root object."
doDrain(root)
print "Writing checkpoint"
internal.main.serializeAll(dir)
internal.sim_object.serializeAll(dir)
resume(root)
def restoreCheckpoint(root, dir):
print "Restoring from checkpoint"
internal.main.unserializeAll(dir)
resume(root)
internal.sim_object.unserializeAll(dir)
need_resume.append(root)
def changeToAtomic(system):
if not isinstance(system, objects.Root) and not isinstance(system, objects.System):
@@ -152,7 +187,7 @@ def changeToAtomic(system):
"called on a root object."
doDrain(system)
print "Changing memory mode to atomic"
system.changeTiming(internal.main.SimObject.Atomic)
system.changeTiming(internal.sim_object.SimObject.Atomic)
def changeToTiming(system):
if not isinstance(system, objects.Root) and not isinstance(system, objects.System):
@@ -160,7 +195,7 @@ def changeToTiming(system):
"called on a root object."
doDrain(system)
print "Changing memory mode to timing"
system.changeTiming(internal.main.SimObject.Timing)
system.changeTiming(internal.sim_object.SimObject.Timing)
def switchCpus(cpuList):
print "switching cpus"
@@ -180,7 +215,7 @@ def switchCpus(cpuList):
raise TypeError, "%s is not of type BaseCPU" % cpu
# Drain all of the individual CPUs
drain_event = internal.main.createCountedDrain()
drain_event = internal.event.createCountedDrain()
unready_cpus = 0
for old_cpu in old_cpus:
unready_cpus += old_cpu.startDrain(drain_event, False)
@@ -188,7 +223,7 @@ def switchCpus(cpuList):
if unready_cpus > 0:
drain_event.setCount(unready_cpus)
simulate()
internal.main.cleanupCountedDrain(drain_event)
internal.event.cleanupCountedDrain(drain_event)
# Now all of the CPUs are ready to be switched out
for old_cpu in old_cpus:
old_cpu._ccObject.switchOut()
@@ -198,6 +233,14 @@ def switchCpus(cpuList):
new_cpu._ccObject.resume()
index += 1
def dumpStats():
print 'Dumping stats'
internal.stats.dump()
def resetStats():
print 'Resetting stats'
internal.stats.reset()
# Since we have so many mutual imports in this package, we should:
# 1. Put all intra-package imports at the *bottom* of the file, unless
# they're absolutely needed before that (for top-level statements

4
src/python/m5/main.py
View File

@@ -240,7 +240,7 @@ def main():
print "M5 Simulator System"
print brief_copyright
print
print "M5 compiled %s" % internal.main.cvar.compileDate;
print "M5 compiled %s" % internal.core.cvar.compileDate;
print "M5 started %s" % datetime.now().ctime()
print "M5 executing on %s" % socket.gethostname()
print "command line:",
@@ -256,7 +256,7 @@ def main():
usage(2)
# tell C++ about output directory
internal.main.setOutputDir(options.outdir)
internal.core.setOutputDir(options.outdir)
# update the system path with elements from the -p option
sys.path[0:0] = options.path

5
src/python/m5/params.py
View File

@@ -894,9 +894,8 @@ class PortRef(object):
if self.ccConnected: # already done this
return
peer = self.peer
internal.main.connectPorts(self.simobj.getCCObject(), self.name,
self.index, peer.simobj.getCCObject(),
peer.name, peer.index)
internal.sim_object.connectPorts(self.simobj.getCCObject(), self.name,
self.index, peer.simobj.getCCObject(), peer.name, peer.index)
self.ccConnected = True
peer.ccConnected = True