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arch,cpu: Add boilerplate support for matrix registers

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We add initial support for matrix registers to the CPU models and add
stubs in each architecture. There are no implementations of matrix
registers added, but this provides the basic support for using them in
the future.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1289

Change-Id: I2ca6a21da932a58a801a0d08f0ad0cdca4968d02
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64333
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Sascha Bischoff
2022-08-09 09:37:47 +01:00
committed by Giacomo Travaglini
parent dd6595bf56
commit fed81f3408
24 changed files with 124 additions and 3 deletions
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src/arch/SConscript
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@@ -231,10 +231,11 @@ DebugFlag('IntRegs')
DebugFlag('FloatRegs')
DebugFlag('VecRegs')
DebugFlag('VecPredRegs')
DebugFlag('MatRegs')
DebugFlag('CCRegs')
DebugFlag('MiscRegs')
CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'VecRegs', 'VecPredRegs',
'CCRegs', 'MiscRegs' ])
'MatRegs', 'CCRegs', 'MiscRegs' ])
DebugFlag('Decoder', "Decoder debug output")
DebugFlag('Faults', "Information about faults, exceptions, interrupts, etc")