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Remove bus and top level parameters from cache

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src/mem/cache/base_cache.hh:
    Remove top level param from cache
src/mem/cache/coherence/uni_coherence.cc:
    Remove top level parameters from the cache

--HG--
extra : convert_revision : 4437aeedc20866869de7f9ab123dfa7baeebedf0
This commit is contained in:
Ron Dreslinski
2006-10-12 14:21:25 -04:00
parent f89b56b61a
commit fe230ddb8f
3 changed files with 10 additions and 40 deletions
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9
src/mem/cache/cache_impl.hh vendored
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@@ -151,12 +151,7 @@ Cache(const std::string &_name,
doCopy(params.doCopy), blockOnCopy(params.blockOnCopy),
hitLatency(params.hitLatency)
{
//FIX BUS POINTERS
// if (params.in == NULL) {
topLevelCache = true;
// }
//PLEASE FIX THIS, BUS SIZES NOT BEING USED
tags->setCache(this, blkSize, 1/*params.out->width, params.out->clockRate*/);
tags->setCache(this);
tags->setPrefetcher(prefetcher);
missQueue->setCache(this);
missQueue->setPrefetcher(prefetcher);
@@ -397,7 +392,7 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt)
Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1));
BlkType *blk = tags->findBlock(pkt);
MSHR *mshr = missQueue->findMSHR(blk_addr);
if (isTopLevel() && coherence->hasProtocol()) { //@todo Move this into handle bus req
if (coherence->hasProtocol()) { //@todo Move this into handle bus req
//If we find an mshr, and it is in service, we need to NACK or invalidate
if (mshr) {
if (mshr->inService) {