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Merge zeep.pool:/z/saidi/work/m5.newmem

Browse Source 
into  zeep.pool:/z/saidi/work/m5.suncc

--HG--
extra : convert_revision : 20f61a524a3b53fc0afcf53a24b5a1fe1d96f579
This commit is contained in:
Ali Saidi
2007-01-26 18:49:40 -05:00
parent 8561c8366c 63fdabf191
commit fd8a4ff5a8
52 changed files with 236 additions and 134 deletions
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8
src/cpu/SConscript
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@@ -54,18 +54,18 @@ execfile(models_db.srcnode().abspath)
exec_sig_template = '''
virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
{ panic("initiateAcc not defined!"); };
{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
virtual Fault completeAcc(Packet *pkt, %s *xc,
Trace::InstRecord *traceData) const
{ panic("completeAcc not defined!"); };
{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
'''
mem_ini_sig_template = '''
virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); };
virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
'''
mem_comp_sig_template = '''
virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; };
virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
'''
# Generate a temporary CPU list, including the CheckerCPU if

6
src/cpu/activity.cc
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@@ -28,6 +28,8 @@
* Authors: Kevin Lim
*/
#include <cstring>
#include "base/timebuf.hh"
#include "cpu/activity.hh"
@@ -37,7 +39,7 @@ ActivityRecorder::ActivityRecorder(int num_stages, int longest_latency,
activityCount(activity), numStages(num_stages)
{
stageActive = new bool[numStages];
memset(stageActive, 0, numStages);
std::memset(stageActive, 0, numStages);
}
void
@@ -114,7 +116,7 @@ void
ActivityRecorder::reset()
{
activityCount = 0;
memset(stageActive, 0, numStages);
std::memset(stageActive, 0, numStages);
for (int i = 0; i < longestLatency + 1; ++i)
activityBuffer.advance();
}

3
src/cpu/exetrace.hh
View File

@@ -32,6 +32,7 @@
#ifndef __EXETRACE_HH__
#define __EXETRACE_HH__
#include <cstring>
#include <fstream>
#include <vector>
@@ -169,7 +170,7 @@ InstRecord::setRegs(const IntRegFile &regs)
if (!iregs)
iregs = new iRegFile;
memcpy(&iregs->regs, &regs, sizeof(IntRegFile));
std::memcpy(&iregs->regs, &regs, sizeof(IntRegFile));
regs_valid = true;
}

3
src/cpu/simple/base.hh
View File

@@ -186,7 +186,8 @@ class BaseSimpleCPU : public BaseCPU
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
void setEA(Addr EA) { panic("BaseSimpleCPU::setEA() not implemented\n"); }
Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n"); }
Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n");
M5_DUMMY_RETURN}
void prefetch(Addr addr, unsigned flags)
{