diff --git a/src/cpu/o3/SConscript b/src/cpu/o3/SConscript index 44882e5ec2..afbd4c533c 100755 --- a/src/cpu/o3/SConscript +++ b/src/cpu/o3/SConscript @@ -59,13 +59,12 @@ elif env['TARGET_ISA'] == 'mips': mips/cpu_builder.cc ''') elif env['TARGET_ISA'] == 'sparc': - sys.exit('O3 CPU does not support Sparc') - #sources += Split(''' - # sparc/dyn_inst.cc - # sparc/cpu.cc - # sparc/thread_context.cc - # sparc/cpu_builder.cc - # ''') + sources += Split(''' + sparc/dyn_inst.cc + sparc/cpu.cc + sparc/thread_context.cc + sparc/cpu_builder.cc + ''') else: sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA']) diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 5f7caf79fd..2795134934 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -41,6 +41,10 @@ template class MipsDynInst; struct MipsSimpleImpl; typedef MipsDynInst O3DynInst; +#elif THE_ISA == SPARC_ISA + template class SparcDynInst; + struct SparcSimpleImpl; + typedef SparcDynInst O3DynInst; #else #error "O3DynInst not defined for this ISA" #endif