diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index bf0b07ca29..4c9a7b5a2d 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -87,7 +87,6 @@ class DefaultCommit { public: // Typedefs from the Impl. - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::TimeStruct TimeStruct; typedef typename Impl::FetchStruct FetchStruct; typedef typename Impl::IEWStruct IEWStruct; @@ -136,7 +135,7 @@ class DefaultCommit public: /** Construct a DefaultCommit with the given parameters. */ - DefaultCommit(O3CPU *_cpu, const DerivO3CPUParams ¶ms); + DefaultCommit(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of the DefaultCommit. */ std::string name() const; @@ -357,7 +356,7 @@ class DefaultCommit private: /** Pointer to O3CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Vector of all of the threads. */ std::vector thread; @@ -480,7 +479,7 @@ class DefaultCommit struct CommitStats : public Stats::Group { - CommitStats(O3CPU *cpu, DefaultCommit *commit); + CommitStats(FullO3CPU *cpu, DefaultCommit *commit); /** Stat for the total number of squashed instructions discarded by * commit. */ diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 06694bf257..4442eb9904 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -79,7 +79,8 @@ DefaultCommit::processTrapEvent(ThreadID tid) } template -DefaultCommit::DefaultCommit(O3CPU *_cpu, const DerivO3CPUParams ¶ms) +DefaultCommit::DefaultCommit(FullO3CPU *_cpu, + const DerivO3CPUParams ¶ms) : commitPolicy(params.smtCommitPolicy), cpu(_cpu), iewToCommitDelay(params.iewToCommitDelay), @@ -150,7 +151,7 @@ DefaultCommit::regProbePoints() } template -DefaultCommit::CommitStats::CommitStats(O3CPU *cpu, +DefaultCommit::CommitStats::CommitStats(FullO3CPU *cpu, DefaultCommit *commit) : Stats::Group(cpu, "commit"), ADD_STAT(commitSquashedInsts, Stats::Units::Count::get(), @@ -344,7 +345,7 @@ DefaultCommit::startupStage() // Commit must broadcast the number of free entries it has at the // start of the simulation, so it starts as active. - cpu->activateStage(O3CPU::CommitIdx); + cpu->activateStage(FullO3CPU::CommitIdx); cpu->activityThisCycle(); } @@ -496,10 +497,10 @@ DefaultCommit::updateStatus() if (_nextStatus == Inactive && _status == Active) { DPRINTF(Activity, "Deactivating stage.\n"); - cpu->deactivateStage(O3CPU::CommitIdx); + cpu->deactivateStage(FullO3CPU::CommitIdx); } else if (_nextStatus == Active && _status == Inactive) { DPRINTF(Activity, "Activating stage.\n"); - cpu->activateStage(O3CPU::CommitIdx); + cpu->activateStage(FullO3CPU::CommitIdx); } _status = _nextStatus; diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 1ed725b8ee..07e0893709 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -315,7 +315,7 @@ FullO3CPU::FullO3CPU(const DerivO3CPUParams ¶ms) DPRINTF(O3CPU, "Workload[%i] process is %#x", tid, this->thread[tid]); this->thread[tid] = new typename FullO3CPU::Thread( - (typename Impl::O3CPU *)(this), + (FullO3CPU *)(this), tid, params.workload[tid]); //usedTids[tid] = true; @@ -326,8 +326,7 @@ FullO3CPU::FullO3CPU(const DerivO3CPUParams ¶ms) Process* dummy_proc = NULL; this->thread[tid] = new typename FullO3CPU::Thread( - (typename Impl::O3CPU *)(this), - tid, dummy_proc); + this, tid, dummy_proc); //usedTids[tid] = false; } } @@ -346,8 +345,7 @@ FullO3CPU::FullO3CPU(const DerivO3CPUParams ¶ms) o3_tc, this->checker); } - o3_tc->cpu = (typename Impl::O3CPU *)(this); - assert(o3_tc->cpu); + o3_tc->cpu = this; o3_tc->thread = this->thread[tid]; // Give the thread the TC. @@ -391,8 +389,7 @@ FullO3CPU::regProbePoints() } template -FullO3CPU:: -FullO3CPUStats::FullO3CPUStats(FullO3CPU *cpu) +FullO3CPU::FullO3CPUStats::FullO3CPUStats(FullO3CPU *cpu) : Stats::Group(cpu), ADD_STAT(timesIdled, Stats::Units::Count::get(), "Number of times that the entire CPU went into an idle state " diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index fbf402e9d9..2eeedea004 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -101,8 +101,6 @@ class FullO3CPU : public BaseO3CPU { public: // Typedefs from the Impl here. - typedef typename Impl::O3CPU O3CPU; - typedef O3ThreadState ImplState; typedef O3ThreadState Thread; diff --git a/src/cpu/o3/decode.hh b/src/cpu/o3/decode.hh index 38ba0a6cd3..1d9e04e1fd 100644 --- a/src/cpu/o3/decode.hh +++ b/src/cpu/o3/decode.hh @@ -50,6 +50,9 @@ struct DerivO3CPUParams; +template +class FullO3CPU; + /** * DefaultDecode class handles both single threaded and SMT * decode. Its width is specified by the parameters; each cycles it @@ -62,7 +65,6 @@ class DefaultDecode { private: // Typedefs from the Impl. - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::FetchStruct FetchStruct; typedef typename Impl::DecodeStruct DecodeStruct; typedef typename Impl::TimeStruct TimeStruct; @@ -97,7 +99,7 @@ class DefaultDecode public: /** DefaultDecode constructor. */ - DefaultDecode(O3CPU *_cpu, const DerivO3CPUParams ¶ms); + DefaultDecode(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms); void startupStage(); @@ -204,7 +206,7 @@ class DefaultDecode private: // Interfaces to objects outside of decode. /** CPU interface. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Time buffer interface. */ TimeBuffer *timeBuffer; @@ -295,7 +297,7 @@ class DefaultDecode struct DecodeStats : public Stats::Group { - DecodeStats(O3CPU *cpu); + DecodeStats(FullO3CPU *cpu); /** Stat for total number of idle cycles. */ Stats::Scalar idleCycles; diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh index bfbf98f67b..fc03145bb9 100644 --- a/src/cpu/o3/decode_impl.hh +++ b/src/cpu/o3/decode_impl.hh @@ -59,7 +59,8 @@ using std::list; template -DefaultDecode::DefaultDecode(O3CPU *_cpu, const DerivO3CPUParams ¶ms) +DefaultDecode::DefaultDecode(FullO3CPU *_cpu, + const DerivO3CPUParams ¶ms) : cpu(_cpu), renameToDecodeDelay(params.renameToDecodeDelay), iewToDecodeDelay(params.iewToDecodeDelay), @@ -122,7 +123,7 @@ DefaultDecode::name() const } template -DefaultDecode::DecodeStats::DecodeStats(O3CPU *cpu) +DefaultDecode::DecodeStats::DecodeStats(FullO3CPU *cpu) : Stats::Group(cpu, "decode"), ADD_STAT(idleCycles, Stats::Units::Cycle::get(), "Number of cycles decode is idle"), @@ -457,7 +458,7 @@ DefaultDecode::updateStatus() DPRINTF(Activity, "Activating stage.\n"); - cpu->activateStage(O3CPU::DecodeIdx); + cpu->activateStage(FullO3CPU::DecodeIdx); } } else { // If it's not unblocking, then decode will not have any internal @@ -466,7 +467,7 @@ DefaultDecode::updateStatus() _status = Inactive; DPRINTF(Activity, "Deactivating stage.\n"); - cpu->deactivateStage(O3CPU::DecodeIdx); + cpu->deactivateStage(FullO3CPU::DecodeIdx); } } } diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index dee344b414..2b9e2de84a 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -73,7 +73,6 @@ class DefaultFetch { public: /** Typedefs from Impl. */ - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::FetchStruct FetchStruct; typedef typename Impl::TimeStruct TimeStruct; @@ -212,7 +211,7 @@ class DefaultFetch public: /** DefaultFetch constructor. */ - DefaultFetch(O3CPU *_cpu, const DerivO3CPUParams ¶ms); + DefaultFetch(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of fetch. */ std::string name() const; @@ -402,7 +401,7 @@ class DefaultFetch private: /** Pointer to the O3CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Time buffer interface. */ TimeBuffer *timeBuffer; @@ -544,7 +543,7 @@ class DefaultFetch protected: struct FetchStatGroup : public Stats::Group { - FetchStatGroup(O3CPU *cpu, DefaultFetch *fetch); + FetchStatGroup(FullO3CPU *cpu, DefaultFetch *fetch); // @todo: Consider making these // vectors and tracking on a per thread basis. /** Stat for total number of cycles stalled due to an icache miss. */ diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 587ae1ae18..a5627e1644 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -73,7 +73,8 @@ #include "sim/system.hh" template -DefaultFetch::DefaultFetch(O3CPU *_cpu, const DerivO3CPUParams ¶ms) +DefaultFetch::DefaultFetch(FullO3CPU *_cpu, + const DerivO3CPUParams ¶ms) : fetchPolicy(params.smtFetchPolicy), cpu(_cpu), branchPred(nullptr), @@ -158,7 +159,7 @@ DefaultFetch::regProbePoints() template DefaultFetch:: -FetchStatGroup::FetchStatGroup(O3CPU *cpu, DefaultFetch *fetch) +FetchStatGroup::FetchStatGroup(FullO3CPU *cpu, DefaultFetch *fetch) : Stats::Group(cpu, "fetch"), ADD_STAT(icacheStallCycles, Stats::Units::Cycle::get(), "Number of cycles fetch is stalled on an Icache miss"), @@ -493,7 +494,7 @@ DefaultFetch::switchToActive() if (_status == Inactive) { DPRINTF(Activity, "Activating stage.\n"); - cpu->activateStage(O3CPU::FetchIdx); + cpu->activateStage(FullO3CPU::FetchIdx); _status = Active; } @@ -506,7 +507,7 @@ DefaultFetch::switchToInactive() if (_status == Active) { DPRINTF(Activity, "Deactivating stage.\n"); - cpu->deactivateStage(O3CPU::FetchIdx); + cpu->deactivateStage(FullO3CPU::FetchIdx); _status = Inactive; } @@ -831,7 +832,7 @@ DefaultFetch::updateFetchStatus() "completion\n",tid); } - cpu->activateStage(O3CPU::FetchIdx); + cpu->activateStage(FullO3CPU::FetchIdx); } return Active; @@ -842,7 +843,7 @@ DefaultFetch::updateFetchStatus() if (_status == Active) { DPRINTF(Activity, "Deactivating stage.\n"); - cpu->deactivateStage(O3CPU::FetchIdx); + cpu->deactivateStage(FullO3CPU::FetchIdx); } return Inactive; diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index 4afee5bf76..a0f48697f0 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -82,7 +82,6 @@ class DefaultIEW { private: //Typedefs from Impl - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::TimeStruct TimeStruct; typedef typename Impl::IEWStruct IEWStruct; typedef typename Impl::RenameStruct RenameStruct; @@ -129,7 +128,7 @@ class DefaultIEW public: /** Constructs a DefaultIEW with the given parameters. */ - DefaultIEW(O3CPU *_cpu, const DerivO3CPUParams ¶ms); + DefaultIEW(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of the DefaultIEW stage. */ std::string name() const; @@ -347,7 +346,7 @@ class DefaultIEW private: /** CPU pointer. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Records if IEW has written to the time buffer this cycle, so that the * CPU can deschedule itself if there is no activity. @@ -424,7 +423,7 @@ class DefaultIEW struct IEWStats : public Stats::Group { - IEWStats(O3CPU *cpu); + IEWStats(FullO3CPU *cpu); /** Stat for total number of idle cycles. */ Stats::Scalar idleCycles; @@ -460,7 +459,7 @@ class DefaultIEW struct ExecutedInstStats : public Stats::Group { - ExecutedInstStats(O3CPU* cpu); + ExecutedInstStats(FullO3CPU *cpu); /** Stat for total number of executed instructions. */ Stats::Scalar numInsts; diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index 7c6fe5a6a9..54327fa5a4 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -62,7 +62,8 @@ #include "params/DerivO3CPU.hh" template -DefaultIEW::DefaultIEW(O3CPU *_cpu, const DerivO3CPUParams ¶ms) +DefaultIEW::DefaultIEW(FullO3CPU *_cpu, + const DerivO3CPUParams ¶ms) : issueToExecQueue(params.backComSize, params.forwardComSize), cpu(_cpu), instQueue(_cpu, this, params), @@ -142,8 +143,7 @@ DefaultIEW::regProbePoints() } template -DefaultIEW:: -IEWStats::IEWStats(O3CPU *cpu) +DefaultIEW::IEWStats::IEWStats(FullO3CPU *cpu) : Stats::Group(cpu), ADD_STAT(idleCycles, Stats::Units::Cycle::get(), "Number of cycles IEW is idle"), @@ -218,8 +218,8 @@ IEWStats::IEWStats(O3CPU *cpu) } template -DefaultIEW::IEWStats:: -ExecutedInstStats::ExecutedInstStats(O3CPU *cpu) +DefaultIEW::IEWStats::ExecutedInstStats::ExecutedInstStats( + FullO3CPU *cpu) : Stats::Group(cpu), ADD_STAT(numInsts, Stats::Units::Count::get(), "Number of executed instructions"), @@ -288,7 +288,7 @@ DefaultIEW::startupStage() cpu->checker->setDcachePort(&ldstQueue.getDataPort()); } - cpu->activateStage(O3CPU::IEWIdx); + cpu->activateStage(FullO3CPU::IEWIdx); } template @@ -865,7 +865,7 @@ inline void DefaultIEW::activateStage() { DPRINTF(Activity, "Activating stage.\n"); - cpu->activateStage(O3CPU::IEWIdx); + cpu->activateStage(FullO3CPU::IEWIdx); } template @@ -873,7 +873,7 @@ inline void DefaultIEW::deactivateStage() { DPRINTF(Activity, "Deactivating stage.\n"); - cpu->deactivateStage(O3CPU::IEWIdx); + cpu->deactivateStage(FullO3CPU::IEWIdx); } template diff --git a/src/cpu/o3/impl.hh b/src/cpu/o3/impl.hh index 2c7242ea60..d9d3e1fc82 100644 --- a/src/cpu/o3/impl.hh +++ b/src/cpu/o3/impl.hh @@ -31,10 +31,6 @@ #include "cpu/o3/comm.hh" -// Forward declarations. -template -class FullO3CPU; - /** Implementation specific struct that defines several key types to the * CPU, the stages within the CPU, the time buffers, and the DynInst. * The struct defines the ISA, the CPU policy, the specific DynInst, the @@ -62,16 +58,6 @@ struct O3CPUImpl /** The struct for all backwards communication. */ typedef TimeBufStruct TimeStruct; - - - /** The O3CPU type to be used. */ - typedef FullO3CPU O3CPU; - - /** Same typedef, but for CPUType. BaseDynInst may not always use - * an O3 CPU, so it's clearer to call it CPUType instead in that - * case. - */ - typedef O3CPU CPUType; }; #endif // __CPU_O3_SPARC_IMPL_HH__ diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh index 6c85ffd87e..879655d6be 100644 --- a/src/cpu/o3/inst_queue.hh +++ b/src/cpu/o3/inst_queue.hh @@ -67,6 +67,9 @@ class MemInterface; template class DefaultIEW; +template +class FullO3CPU; + /** * A standard instruction queue class. It holds ready instructions, in * order, in seperate priority queues to facilitate the scheduling of @@ -89,7 +92,6 @@ class InstructionQueue { public: //Typedefs from the Impl. - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::IssueStruct IssueStruct; typedef typename Impl::TimeStruct TimeStruct; @@ -125,7 +127,7 @@ class InstructionQueue }; /** Constructs an IQ. */ - InstructionQueue(O3CPU *cpu_ptr, DefaultIEW *iew_ptr, + InstructionQueue(FullO3CPU *cpu_ptr, DefaultIEW *iew_ptr, const DerivO3CPUParams ¶ms); /** Destructs the IQ. */ @@ -282,7 +284,7 @@ class InstructionQueue ///////////////////////// /** Pointer to the CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Cache interface. */ MemInterface *dcacheInterface; @@ -479,7 +481,7 @@ class InstructionQueue struct IQStats : public Stats::Group { - IQStats(O3CPU *cpu, const unsigned &total_width); + IQStats(FullO3CPU *cpu, const unsigned &total_width); /** Stat for number of instructions added. */ Stats::Scalar instsAdded; /** Stat for number of non-speculative instructions added. */ diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 9373f6b879..315974247e 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -84,7 +84,7 @@ InstructionQueue::FUCompletion::description() const } template -InstructionQueue::InstructionQueue(O3CPU *cpu_ptr, +InstructionQueue::InstructionQueue(FullO3CPU *cpu_ptr, DefaultIEW *iew_ptr, const DerivO3CPUParams ¶ms) : cpu(cpu_ptr), iewStage(iew_ptr), @@ -177,7 +177,7 @@ InstructionQueue::name() const template InstructionQueue:: -IQStats::IQStats(O3CPU *cpu, const unsigned &total_width) +IQStats::IQStats(FullO3CPU *cpu, const unsigned &total_width) : Stats::Group(cpu), ADD_STAT(instsAdded, Stats::Units::Count::get(), "Number of instructions added to the IQ (excludes non-spec)"), diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh index eb76e655a3..021bab5380 100644 --- a/src/cpu/o3/lsq.hh +++ b/src/cpu/o3/lsq.hh @@ -75,8 +75,6 @@ template class LSQ { public: - typedef typename Impl::O3CPU O3CPU; - class LSQRequest; /** Derived class to hold any sender state the LSQ needs. */ class LSQSenderState : public Packet::SenderState @@ -794,7 +792,7 @@ class LSQ }; /** Constructs an LSQ with the given parameters. */ - LSQ(O3CPU *cpu_ptr, DefaultIEW *iew_ptr, + LSQ(FullO3CPU *cpu_ptr, DefaultIEW *iew_ptr, const DerivO3CPUParams ¶ms); ~LSQ() { } @@ -1051,7 +1049,7 @@ class LSQ const std::vector& byte_enable); /** The CPU pointer. */ - O3CPU *cpu; + FullO3CPU *cpu; /** The IEW stage pointer. */ DefaultIEW *iewStage; diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 5cde78e0f8..bb53bb62fc 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -68,7 +68,7 @@ LSQ::LSQSenderState::contextId() } template -LSQ::LSQ(O3CPU *cpu_ptr, DefaultIEW *iew_ptr, +LSQ::LSQ(FullO3CPU *cpu_ptr, DefaultIEW *iew_ptr, const DerivO3CPUParams ¶ms) : cpu(cpu_ptr), iewStage(iew_ptr), _cacheBlocked(false), diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 4d3c41958e..14768f8d20 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -85,7 +85,6 @@ class LSQUnit public: static constexpr auto MaxDataBytes = MaxVecRegLenInBytes; - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::IssueStruct IssueStruct; using LSQSenderState = typename LSQ::LSQSenderState; @@ -225,7 +224,7 @@ class LSQUnit } /** Initializes the LSQ unit with the specified number of entries. */ - void init(O3CPU *cpu_ptr, DefaultIEW *iew_ptr, + void init(FullO3CPU *cpu_ptr, DefaultIEW *iew_ptr, const DerivO3CPUParams ¶ms, LSQ *lsq_ptr, unsigned id); /** Returns the name of the LSQ unit. */ @@ -398,7 +397,7 @@ class LSQUnit private: /** Pointer to the CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Pointer to the IEW stage. */ DefaultIEW *iewStage; diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 174916df99..df789ce6b3 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -215,7 +215,7 @@ LSQUnit::LSQUnit(uint32_t lqEntries, uint32_t sqEntries) template void -LSQUnit::init(O3CPU *cpu_ptr, DefaultIEW *iew_ptr, +LSQUnit::init(FullO3CPU *cpu_ptr, DefaultIEW *iew_ptr, const DerivO3CPUParams ¶ms, LSQ *lsq_ptr, unsigned id) { lsqID = id; diff --git a/src/cpu/o3/mem_dep_unit.hh b/src/cpu/o3/mem_dep_unit.hh index b2cf9bf8d2..3874e5fa32 100644 --- a/src/cpu/o3/mem_dep_unit.hh +++ b/src/cpu/o3/mem_dep_unit.hh @@ -68,6 +68,9 @@ struct DerivO3CPUParams; template class InstructionQueue; +template +class FullO3CPU; + /** * Memory dependency unit class. This holds the memory dependence predictor. * As memory operations are issued to the IQ, they are also issued to this @@ -86,8 +89,6 @@ class MemDepUnit std::string _name; public: - typedef typename Impl::O3CPU O3CPU; - /** Empty constructor. Must call init() prior to using in this case. */ MemDepUnit(); @@ -101,7 +102,8 @@ class MemDepUnit std::string name() const { return _name; } /** Initializes the unit with parameters and a thread id. */ - void init(const DerivO3CPUParams ¶ms, ThreadID tid, O3CPU *cpu); + void init(const DerivO3CPUParams ¶ms, ThreadID tid, + FullO3CPU *cpu); /** Determine if we are drained. */ bool isDrained() const; diff --git a/src/cpu/o3/mem_dep_unit_impl.hh b/src/cpu/o3/mem_dep_unit_impl.hh index 34bba53d95..ce1aa2639b 100644 --- a/src/cpu/o3/mem_dep_unit_impl.hh +++ b/src/cpu/o3/mem_dep_unit_impl.hh @@ -99,7 +99,7 @@ MemDepUnit::~MemDepUnit() template void MemDepUnit::init( - const DerivO3CPUParams ¶ms, ThreadID tid, O3CPU *cpu) + const DerivO3CPUParams ¶ms, ThreadID tid, FullO3CPU *cpu) { DPRINTF(MemDepUnit, "Creating MemDepUnit %i object.\n",tid); diff --git a/src/cpu/o3/probe/elastic_trace.hh b/src/cpu/o3/probe/elastic_trace.hh index 70f2763b8e..914e4eab4e 100644 --- a/src/cpu/o3/probe/elastic_trace.hh +++ b/src/cpu/o3/probe/elastic_trace.hh @@ -60,6 +60,9 @@ #include "sim/eventq.hh" #include "sim/probe/probe.hh" +template +class FullO3CPU; + /** * The elastic trace is a type of probe listener and listens to probe points * in multiple stages of the O3CPU. The notify method is called on a probe diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh index 2c4796a0bd..0fa8f18f20 100644 --- a/src/cpu/o3/rename.hh +++ b/src/cpu/o3/rename.hh @@ -74,7 +74,6 @@ class DefaultRename { public: // Typedefs from the Impl. - typedef typename Impl::O3CPU O3CPU; typedef typename Impl::DecodeStruct DecodeStruct; typedef typename Impl::RenameStruct RenameStruct; typedef typename Impl::TimeStruct TimeStruct; @@ -126,7 +125,7 @@ class DefaultRename public: /** DefaultRename constructor. */ - DefaultRename(O3CPU *_cpu, const DerivO3CPUParams ¶ms); + DefaultRename(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of rename. */ std::string name() const; @@ -320,7 +319,7 @@ class DefaultRename std::list historyBuffer[O3MaxThreads]; /** Pointer to CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Pointer to main time buffer used for backwards communication. */ TimeBuffer *timeBuffer; diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index bc33c5d83d..1a5409ba68 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -53,7 +53,8 @@ #include "params/DerivO3CPU.hh" template -DefaultRename::DefaultRename(O3CPU *_cpu, const DerivO3CPUParams ¶ms) +DefaultRename::DefaultRename(FullO3CPU *_cpu, + const DerivO3CPUParams ¶ms) : cpu(_cpu), iewToRenameDelay(params.iewToRenameDelay), decodeToRenameDelay(params.decodeToRenameDelay), @@ -865,7 +866,7 @@ DefaultRename::updateStatus() DPRINTF(Activity, "Activating stage.\n"); - cpu->activateStage(O3CPU::RenameIdx); + cpu->activateStage(FullO3CPU::RenameIdx); } } else { // If it's not unblocking, then rename will not have any internal @@ -874,7 +875,7 @@ DefaultRename::updateStatus() _status = Inactive; DPRINTF(Activity, "Deactivating stage.\n"); - cpu->deactivateStage(O3CPU::RenameIdx); + cpu->deactivateStage(FullO3CPU::RenameIdx); } } } diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh index 1259b53f8d..155352a17d 100644 --- a/src/cpu/o3/rob.hh +++ b/src/cpu/o3/rob.hh @@ -58,9 +58,6 @@ template class ROB { public: - //Typedefs from the Impl. - typedef typename Impl::O3CPU O3CPU; - typedef std::pair UnmapInfo; typedef typename std::list::iterator InstIt; @@ -84,7 +81,7 @@ class ROB * @param _cpu The cpu object pointer. * @param params The cpu params including several ROB-specific parameters. */ - ROB(O3CPU *_cpu, const DerivO3CPUParams ¶ms); + ROB(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms); std::string name() const; @@ -261,7 +258,7 @@ class ROB void resetState(); /** Pointer to the CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; /** Active Threads in CPU */ std::list *activeThreads; diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh index 6bdf23a790..c48484c091 100644 --- a/src/cpu/o3/rob_impl.hh +++ b/src/cpu/o3/rob_impl.hh @@ -51,7 +51,7 @@ #include "params/DerivO3CPU.hh" template -ROB::ROB(O3CPU *_cpu, const DerivO3CPUParams ¶ms) +ROB::ROB(FullO3CPU *_cpu, const DerivO3CPUParams ¶ms) : robPolicy(params.smtROBPolicy), cpu(_cpu), numEntries(params.numROBEntries), diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index 8dd4165bb7..5a63641aa5 100644 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -63,10 +63,8 @@ template class O3ThreadContext : public ThreadContext { public: - typedef typename Impl::O3CPU O3CPU; - /** Pointer to the CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; bool schedule(PCEvent *e) override diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh index 03091c7729..68d689ebe1 100644 --- a/src/cpu/o3/thread_state.hh +++ b/src/cpu/o3/thread_state.hh @@ -64,11 +64,10 @@ template struct O3ThreadState : public ThreadState { typedef ThreadContext::Status Status; - typedef typename Impl::O3CPU O3CPU; private: /** Pointer to the CPU. */ - O3CPU *cpu; + FullO3CPU *cpu; public: PCEventQueue pcEventQueue; @@ -96,7 +95,7 @@ struct O3ThreadState : public ThreadState /** Pointer to the hardware transactional memory checkpoint. */ std::unique_ptr htmCheckpoint; - O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process) + O3ThreadState(FullO3CPU *_cpu, int _thread_num, Process *_process) : ThreadState(_cpu, _thread_num, _process), cpu(_cpu), comInstEventQueue("instruction-based event queue"), noSquashFromTC(false), trapPending(false), tc(nullptr)