diff --git a/src/cpu/base.cc b/src/cpu/base.cc index e5a661b6ed..a61c99796c 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -407,10 +407,6 @@ BaseCPU::probeInstCommit(const StaticInstPtr &inst, Addr pc) BaseCPU:: BaseCPUStats::BaseCPUStats(statistics::Group *parent) : statistics::Group(parent), - ADD_STAT(numInsts, statistics::units::Count::get(), - "Number of instructions committed (core level)"), - ADD_STAT(numOps, statistics::units::Count::get(), - "Number of ops (including micro ops) committed (core level)"), ADD_STAT(numCycles, statistics::units::Cycle::get(), "Number of cpu cycles simulated"), ADD_STAT(cpi, statistics::units::Rate< diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index 5857f696dd..e22e1628d2 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -261,8 +261,6 @@ BaseKvmCPU::restartEqThread() BaseKvmCPU::StatGroup::StatGroup(statistics::Group *parent) : statistics::Group(parent), - ADD_STAT(committedInsts, statistics::units::Count::get(), - "Number of instructions committed"), ADD_STAT(numVMExits, statistics::units::Count::get(), "total number of KVM exits"), ADD_STAT(numVMHalfEntries, statistics::units::Count::get(), @@ -778,8 +776,6 @@ BaseKvmCPU::kvmRun(Tick ticks) /* Update statistics */ baseStats.numCycles += simCyclesExecuted;; - stats.committedInsts += instsExecuted; - // update both old and new stats commitStats[thread->threadId()]->numInsts += instsExecuted; baseStats.numInsts += instsExecuted; ctrInsts += instsExecuted; diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh index 2d81c7c7eb..7bbf393f9b 100644 --- a/src/cpu/kvm/base.hh +++ b/src/cpu/kvm/base.hh @@ -804,7 +804,6 @@ class BaseKvmCPU : public BaseCPU struct StatGroup : public statistics::Group { StatGroup(statistics::Group *parent); - statistics::Scalar committedInsts; statistics::Scalar numVMExits; statistics::Scalar numVMHalfEntries; statistics::Scalar numExitSignal; diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index 5df00d3f39..4e0fa42087 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -871,8 +871,6 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst) { thread->numInst++; thread->threadStats.numInsts++; - cpu.stats.numInsts++; - // update both old and new stas cpu.commitStats[inst->id.threadId]->numInsts++; cpu.baseStats.numInsts++; @@ -881,9 +879,7 @@ Execute::doInstCommitAccounting(MinorDynInstPtr inst) } thread->numOp++; thread->threadStats.numOps++; - cpu.stats.numOps++; cpu.commitStats[inst->id.threadId]->numOps++; - cpu.baseStats.numOps++; cpu.commitStats[inst->id.threadId] ->committedInstType[inst->staticInst->opClass()]++; diff --git a/src/cpu/minor/stats.cc b/src/cpu/minor/stats.cc index 818db8c360..e4eebd3355 100644 --- a/src/cpu/minor/stats.cc +++ b/src/cpu/minor/stats.cc @@ -45,28 +45,11 @@ namespace minor MinorStats::MinorStats(BaseCPU *base_cpu) : statistics::Group(base_cpu), - ADD_STAT(numInsts, statistics::units::Count::get(), - "Number of instructions committed"), - ADD_STAT(numOps, statistics::units::Count::get(), - "Number of ops (including micro ops) committed"), ADD_STAT(quiesceCycles, statistics::units::Cycle::get(), "Total number of cycles that CPU has spent quiesced or waiting " - "for an interrupt"), - ADD_STAT(cpi, statistics::units::Rate< - statistics::units::Cycle, statistics::units::Count>::get(), - "CPI: cycles per instruction"), - ADD_STAT(ipc, statistics::units::Rate< - statistics::units::Count, statistics::units::Cycle>::get(), - "IPC: instructions per cycle") - + "for an interrupt") { quiesceCycles.prereq(quiesceCycles); - - cpi.precision(6); - cpi = base_cpu->baseStats.numCycles / numInsts; - - ipc.precision(6); - ipc = numInsts / base_cpu->baseStats.numCycles; } } // namespace minor diff --git a/src/cpu/minor/stats.hh b/src/cpu/minor/stats.hh index f7d5e71dfa..98ac80f15c 100644 --- a/src/cpu/minor/stats.hh +++ b/src/cpu/minor/stats.hh @@ -59,19 +59,9 @@ struct MinorStats : public statistics::Group { MinorStats(BaseCPU *parent); - /** Number of simulated instructions */ - statistics::Scalar numInsts; - - /** Number of simulated insts and microops */ - statistics::Scalar numOps; - /** Number of cycles in quiescent state */ statistics::Scalar quiesceCycles; - /** CPI/IPC for total cycle counts and macro insts */ - statistics::Formula cpi; - statistics::Formula ipc; - }; } // namespace minor diff --git a/src/cpu/o3/commit.cc b/src/cpu/o3/commit.cc index 266e59e2e3..538505bcf9 100644 --- a/src/cpu/o3/commit.cc +++ b/src/cpu/o3/commit.cc @@ -1343,7 +1343,6 @@ Commit::updateComInstStats(const DynInstPtr &inst) cpu->baseStats.numInsts++; } cpu->commitStats[tid]->numOps++; - cpu->baseStats.numOps++; // To match the old model, don't count nops and instruction // prefetches towards the total commit count. diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index ca86b0b412..b42b68992f 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -154,10 +154,8 @@ BaseSimpleCPU::countInst() if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) { t_info.numInst++; - t_info.execContextStats.numInsts++; } t_info.numOp++; - t_info.execContextStats.numOps++; } void @@ -183,9 +181,8 @@ BaseSimpleCPU::countCommitInst() commitStats[t_info.thread->threadId()]->numInsts++; baseStats.numInsts++; } - // increment thread level and core level numOps count + // increment thread level numOps count commitStats[t_info.thread->threadId()]->numOps++; - baseStats.numOps++; } Counter diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh index 9639f43058..c8c7076ec2 100644 --- a/src/cpu/simple/exec_context.hh +++ b/src/cpu/simple/exec_context.hh @@ -86,10 +86,6 @@ class SimpleExecContext : public ExecContext : statistics::Group(cpu, csprintf("exec_context.thread_%i", thread->threadId()).c_str()), - ADD_STAT(numInsts, statistics::units::Count::get(), - "Number of instructions committed"), - ADD_STAT(numOps, statistics::units::Count::get(), - "Number of ops (including micro ops) committed"), ADD_STAT(numMatAluAccesses, statistics::units::Count::get(), "Number of matrix alu accesses"), ADD_STAT(numCallsReturns, statistics::units::Count::get(), @@ -139,10 +135,6 @@ class SimpleExecContext : public ExecContext .prereq(numBranchMispred); } - // Number of simulated instructions - statistics::Scalar numInsts; - statistics::Scalar numOps; - // Number of matrix alu accesses statistics::Scalar numMatAluAccesses;