diff --git a/tests/gem5/asmtest/tests.py b/tests/gem5/asmtest/tests.py
index b1efb73ccf..62e4ef5859 100644
--- a/tests/gem5/asmtest/tests.py
+++ b/tests/gem5/asmtest/tests.py
@@ -34,7 +34,7 @@ else:
 # The following lists the RISCV binaries. Those commented out presently result
 # in a test failure. This is outlined in the following Jira issue:
 # https://gem5.atlassian.net/browse/GEM5-496
-binaries = (
+rv64_binaries = (
     "rv64samt-ps-sysclone_d",
     "rv64samt-ps-sysfutex1_d",
     #    'rv64samt-ps-sysfutex2_d',
@@ -213,10 +213,145 @@ binaries = (
     "rv64uzfh-ps-recoding",
 )
 
+rv32_binaries = (
+    "rv32ua-ps-amoadd_w",
+    "rv32ua-ps-amoand_w",
+    "rv32ua-ps-amomaxu_w",
+    "rv32ua-ps-amomax_w",
+    "rv32ua-ps-amominu_w",
+    "rv32ua-ps-amomin_w",
+    "rv32ua-ps-amoor_w",
+    "rv32ua-ps-amoswap_w",
+    "rv32ua-ps-amoxor_w",
+    "rv32ua-ps-lrsc",
+    "rv32uamt-ps-amoadd_w",
+    "rv32uamt-ps-amoand_w",
+    "rv32uamt-ps-amomaxu_w",
+    "rv32uamt-ps-amomax_w",
+    "rv32uamt-ps-amominu_w",
+    "rv32uamt-ps-amomin_w",
+    "rv32uamt-ps-amoor_w",
+    "rv32uamt-ps-amoswap_w",
+    "rv32uamt-ps-amoxor_w",
+    "rv32uamt-ps-lrsc_w",
+    "rv32ub-ps-andn",
+    "rv32ub-ps-bclr",
+    "rv32ub-ps-bclri",
+    "rv32ub-ps-bext",
+    "rv32ub-ps-bexti",
+    "rv32ub-ps-binv",
+    "rv32ub-ps-binvi",
+    "rv32ub-ps-bset",
+    "rv32ub-ps-bseti",
+    "rv32ub-ps-clmul",
+    "rv32ub-ps-clmulh",
+    "rv32ub-ps-clmulr",
+    "rv32ub-ps-clz",
+    "rv32ub-ps-cpop",
+    "rv32ub-ps-ctz",
+    "rv32ub-ps-max",
+    "rv32ub-ps-maxu",
+    "rv32ub-ps-min",
+    "rv32ub-ps-minu",
+    "rv32ub-ps-orc_b",
+    "rv32ub-ps-orn",
+    "rv32ub-ps-rev8",
+    "rv32ub-ps-rol",
+    "rv32ub-ps-ror",
+    "rv32ub-ps-rori",
+    "rv32ub-ps-sext_b",
+    "rv32ub-ps-sext_h",
+    "rv32ub-ps-sh1add",
+    "rv32ub-ps-sh2add",
+    "rv32ub-ps-sh3add",
+    "rv32ub-ps-xnor",
+    "rv32ub-ps-zext_h",
+    "rv32uc-ps-rvc",
+    "rv32ud-ps-fadd",
+    "rv32ud-ps-fclass",
+    "rv32ud-ps-fcmp",
+    "rv32ud-ps-fcvt",
+    "rv32ud-ps-fcvt_w",
+    "rv32ud-ps-fdiv",
+    "rv32ud-ps-fmadd",
+    "rv32ud-ps-fmin",
+    "rv32ud-ps-ldst",
+    "rv32ud-ps-recoding",
+    "rv32uf-ps-fadd",
+    "rv32uf-ps-fclass",
+    "rv32uf-ps-fcmp",
+    "rv32uf-ps-fcvt",
+    "rv32uf-ps-fcvt_w",
+    "rv32uf-ps-fdiv",
+    "rv32uf-ps-fmadd",
+    "rv32uf-ps-fmin",
+    "rv32uf-ps-ldst",
+    "rv32uf-ps-move",
+    "rv32uf-ps-recoding",
+    "rv32ui-ps-add",
+    "rv32ui-ps-addi",
+    "rv32ui-ps-and",
+    "rv32ui-ps-andi",
+    "rv32ui-ps-auipc",
+    "rv32ui-ps-beq",
+    "rv32ui-ps-bge",
+    "rv32ui-ps-bgeu",
+    "rv32ui-ps-blt",
+    "rv32ui-ps-bltu",
+    "rv32ui-ps-bne",
+    "rv32ui-ps-fence_i",
+    "rv32ui-ps-jal",
+    "rv32ui-ps-jalr",
+    "rv32ui-ps-lb",
+    "rv32ui-ps-lbu",
+    "rv32ui-ps-lh",
+    "rv32ui-ps-lhu",
+    "rv32ui-ps-lui",
+    "rv32ui-ps-lw",
+    "rv32ui-ps-or",
+    "rv32ui-ps-ori",
+    "rv32ui-ps-sb",
+    "rv32ui-ps-sh",
+    "rv32ui-ps-simple",
+    "rv32ui-ps-sll",
+    "rv32ui-ps-slli",
+    "rv32ui-ps-slt",
+    "rv32ui-ps-slti",
+    "rv32ui-ps-sltiu",
+    "rv32ui-ps-sltu",
+    "rv32ui-ps-sra",
+    "rv32ui-ps-srai",
+    "rv32ui-ps-srl",
+    "rv32ui-ps-srli",
+    "rv32ui-ps-sub",
+    "rv32ui-ps-sw",
+    "rv32ui-ps-xor",
+    "rv32ui-ps-xori",
+    "rv32um-ps-div",
+    "rv32um-ps-divu",
+    "rv32um-ps-mul",
+    "rv32um-ps-mulh",
+    "rv32um-ps-mulhsu",
+    "rv32um-ps-mulhu",
+    "rv32um-ps-rem",
+    "rv32um-ps-remu",
+    "rv32uzfh-ps-fadd",
+    "rv32uzfh-ps-fclass",
+    "rv32uzfh-ps-fcmp",
+    "rv32uzfh-ps-fcvt",
+    "rv32uzfh-ps-fcvt_w",
+    "rv32uzfh-ps-fdiv",
+    "rv32uzfh-ps-fmadd",
+    "rv32uzfh-ps-fmin",
+    "rv32uzfh-ps-ldst",
+    "rv32uzfh-ps-move",
+    "rv32uzfh-ps-recoding",
+)
+
 cpu_types = ("atomic", "timing", "minor", "o3")
 
 for cpu_type in cpu_types:
-    for binary in binaries:
+    for binary in rv64_binaries:
         gem5_verify_config(
             name=f"asm-riscv-{binary}-{cpu_type}",
             verifiers=(),
@@ -239,3 +374,27 @@ for cpu_type in cpu_types:
             valid_isas=(constants.all_compiled_tag,),
             valid_hosts=constants.supported_hosts,
         )
+    for binary in rv32_binaries:
+        gem5_verify_config(
+            name=f"asm-riscv-{binary}-{cpu_type}",
+            verifiers=(),
+            config=joinpath(
+                config.base_dir,
+                "tests",
+                "gem5",
+                "asmtest",
+                "configs",
+                "riscv_asmtest.py",
+            ),
+            config_args=[
+                binary,
+                cpu_type,
+                "--num-cores",
+                "4",
+                "--riscv-32bits",
+                "--resource-directory",
+                resource_path,
+            ],
+            valid_isas=(constants.all_compiled_tag,),
+            valid_hosts=constants.supported_hosts,
+        )