types: Move stuff for global types into src/base/types.hh

--HG--
rename : src/sim/host.hh => src/base/types.hh
This commit is contained in:
Nathan Binkert
2009-05-17 14:34:50 -07:00
parent cbf237897f
commit eef3a2e142
130 changed files with 141 additions and 141 deletions

View File

@@ -317,12 +317,12 @@ class CheckedIntType(MetaParamValue):
if not cls.cxx_predecls:
# most derived types require this, so we just do it here once
cls.cxx_predecls = ['#include "sim/host.hh"']
cls.cxx_predecls = ['#include "base/types.hh"']
if not cls.swig_predecls:
# most derived types require this, so we just do it here once
cls.swig_predecls = ['%import "stdint.i"\n' +
'%import "sim/host.hh"']
'%import "base/types.hh"']
if not (hasattr(cls, 'min') and hasattr(cls, 'max')):
if not (hasattr(cls, 'size') and hasattr(cls, 'unsigned')):
@@ -766,9 +766,9 @@ frequency_tolerance = 0.001 # 0.1%
class TickParamValue(NumericParamValue):
cxx_type = 'Tick'
cxx_predecls = ['#include "sim/host.hh"']
cxx_predecls = ['#include "base/types.hh"']
swig_predecls = ['%import "stdint.i"\n' +
'%import "sim/host.hh"']
'%import "base/types.hh"']
def getValue(self):
return long(self.value)
@@ -844,9 +844,9 @@ class Frequency(TickParamValue):
# An explicit conversion to a Latency or Frequency must be made first.
class Clock(ParamValue):
cxx_type = 'Tick'
cxx_predecls = ['#include "sim/host.hh"']
cxx_predecls = ['#include "base/types.hh"']
swig_predecls = ['%import "stdint.i"\n' +
'%import "sim/host.hh"']
'%import "base/types.hh"']
def __init__(self, value):
if isinstance(value, (Latency, Clock)):
self.ticks = value.ticks

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@@ -37,7 +37,7 @@
#include "base/misc.hh"
#include "base/socket.hh"
#include "sim/core.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/startup.hh"
extern const char *compileDate;
@@ -59,7 +59,7 @@ inline void disableAllListeners() { ListenSocket::disableAll(); }
%include "stdint.i"
%include "std_string.i"
%include "sim/host.hh"
%include "base/types.hh"
void setOutputDir(const std::string &dir);
void SimStartup();

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@@ -31,12 +31,12 @@
%module debug
%{
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/debug.hh"
%}
%include "stdint.i"
%include "sim/host.hh"
%include "base/types.hh"
%include "sim/debug.hh"
%wrapper %{

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@@ -32,7 +32,7 @@
%{
#include "python/swig/pyevent.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/eventq.hh"
#include "sim/sim_events.hh"
#include "sim/sim_exit.hh"
@@ -75,7 +75,7 @@
%include "stdint.i"
%include "std_string.i"
%include "sim/host.hh"
%include "base/types.hh"
%include "sim/eventq.hh"
%include "python/swig/pyevent.hh"

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@@ -31,7 +31,7 @@
#include <Python.h>
#include "cpu/base.hh"
#include "sim/host.hh"
#include "base/types.hh"
#include "sim/serialize.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"

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@@ -35,7 +35,7 @@
%{
#include <cstdlib>
#include "sim/host.hh"
#include "base/types.hh"
inline void
seed(uint64_t seed)

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@@ -31,7 +31,7 @@
%rename(assign) *::operator=;
%include "base/range.hh"
%include "sim/host.hh"
%include "base/types.hh"
%template(AddrRange) Range<Addr>;
%template(TickRange) Range<Tick>;

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@@ -37,7 +37,7 @@
// import these files for SWIG to wrap
%include "stdint.i"
%include "std_string.i"
%include "sim/host.hh"
%include "base/types.hh"
class BaseCPU;

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@@ -32,7 +32,7 @@
%{
#include "base/trace.hh"
#include "sim/host.hh"
#include "base/types.hh"
inline void
output(const char *filename)