diff --git a/src/arch/arm/ArmDecoder.py b/src/arch/arm/ArmDecoder.py
index 9f01af6edf..a5c16f56ab 100644
--- a/src/arch/arm/ArmDecoder.py
+++ b/src/arch/arm/ArmDecoder.py
@@ -1,3 +1,15 @@
+# Copyright (c) 2021 Arm Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder.  You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
 # Copyright 2021 Google, Inc.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -23,9 +35,13 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
+from m5.params import *
 from m5.objects.InstDecoder import InstDecoder
 
 class ArmDecoder(InstDecoder):
     type = 'ArmDecoder'
     cxx_class = 'gem5::ArmISA::Decoder'
     cxx_header = "arch/arm/decoder.hh"
+
+    dvm_enabled = Param.Bool(False,
+        "Does the decoder implement DVM operations")
diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 9d9053722a..18b8c040de 100644
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014,2018 ARM Limited
+ * Copyright (c) 2012-2014,2018, 2021 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -55,7 +55,9 @@ namespace ArmISA
 GenericISA::BasicDecodeCache<Decoder, ExtMachInst> Decoder::defaultCache;
 
 Decoder::Decoder(const ArmDecoderParams &params)
-    : InstDecoder(params, &data), data(0), fpscrLen(0), fpscrStride(0),
+    : InstDecoder(params, &data),
+      dvmEnabled(params.dvm_enabled),
+      data(0), fpscrLen(0), fpscrStride(0),
       decoderFlavor(dynamic_cast<ISA *>(params.isa)->decoderFlavor())
 {
     reset();
diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 62d6f54ccf..fdabe6c5d9 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2014 ARM Limited
+ * Copyright (c) 2013-2014, 2021 Arm Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -62,6 +62,10 @@ namespace ArmISA
 class ISA;
 class Decoder : public InstDecoder
 {
+  public: // Public decoder parameters
+    /** True if the decoder should emit DVM Ops (treated as Loads) */
+    const bool dvmEnabled;
+
   protected:
     //The extended machine instruction being generated
     ExtMachInst emi;