Started adding a system to output data after every instruction.

src/arch/alpha/regfile.hh:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/cpu/exetrace.hh:
    Added functions to start to support dumping register values once per cycle.
src/cpu/exetrace.cc:
    Added some code to support printing the value of registers after each cycle.
src/python/m5/main.py:
    Options to turn on output after every instruction. They are commented out.

--HG--
extra : convert_revision : 168a48a6b98ab6be412a96bdee831c71906958b0
This commit is contained in:
Gabe Black
2006-08-11 20:21:35 -04:00
parent 800e6ecc07
commit ec26f0bb3d
7 changed files with 76 additions and 2 deletions

View File

@@ -177,6 +177,8 @@ bool_option("print-fetch-seq", default=False,
help="Print fetch sequence numbers in trace output")
bool_option("print-cpseq", default=False,
help="Print correct path sequence numbers in trace output")
#bool_option("print-reg-delta", default=False,
# help="Print which registers changed to what in trace output")
options = attrdict()
arguments = []
@@ -290,6 +292,7 @@ def main():
objects.ExecutionTrace.print_iregs = options.print_iregs
objects.ExecutionTrace.print_fetchseq = options.print_fetch_seq
objects.ExecutionTrace.print_cpseq = options.print_cpseq
#objects.ExecutionTrace.print_reg_delta = options.print_reg_delta
sys.argv = arguments
sys.path = [ os.path.dirname(sys.argv[0]) ] + sys.path