mem: Use the same timing calculation for DRAM read and write

This patch simplifies the DRAM model by re-using the function that computes the busy and access time for both reads and writes.
2013-11-01 11:56:19 -04:00
parent 655bf86828
commit ea76f97576
3 changed files with 38 additions and 83 deletions
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -76,7 +76,6 @@ CompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus',
 DebugFlag('Bridge')
 DebugFlag('CommMonitor')
 DebugFlag('DRAM')
-DebugFlag('DRAMWR')
 DebugFlag('LLSC')
 DebugFlag('MMU')
 DebugFlag('MemoryAccess')