add uglyiness to fix dmas

src/dev/io_device.cc:
    extra printing and assertions
src/mem/bridge.hh:
    deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
    make the cache try to satisfy a functional request from the cache above it before checking itself

--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
This commit is contained in:
Ali Saidi
2007-05-14 16:14:59 -04:00
parent af26532bbd
commit ea4e6f2e3d
3 changed files with 31 additions and 11 deletions

View File

@@ -108,18 +108,24 @@ class Bridge : public MemObject
assert(!partialWriteFixed);
assert(expectResponse);
int pbs = port->peerBlockSize();
Addr pbs = port->peerBlockSize();
Addr blockAddr = pkt->getAddr() & ~(pbs-1);
partialWriteFixed = true;
PacketDataPtr data;
data = new uint8_t[pbs];
PacketPtr funcPkt = new Packet(pkt->req, MemCmd::ReadReq,
Packet::Broadcast, pbs);
funcPkt->dataStatic(data);
port->sendFunctional(funcPkt);
assert(funcPkt->result == Packet::Success);
RequestPtr funcReq = new Request(blockAddr, 4, 0);
PacketPtr funcPkt = new Packet(funcReq, MemCmd::ReadReq,
Packet::Broadcast);
for (int x = 0; x < pbs; x+=4) {
funcReq->setPhys(blockAddr + x, 4, 0);
funcPkt->reinitFromRequest();
funcPkt->dataStatic(data + x);
port->sendFunctional(funcPkt);
assert(funcPkt->result == Packet::Success);
}
delete funcPkt;
delete funcReq;
oldPkt = pkt;
memcpy(data + oldPkt->getOffset(pbs), pkt->getPtr<uint8_t>(),

View File

@@ -1290,9 +1290,9 @@ template<class TagStore, class Coherence>
void
Cache<TagStore,Coherence>::MemSidePort::recvFunctional(PacketPtr pkt)
{
if (checkFunctional(pkt)) {
myCache()->probe(pkt, false, cache->cpuSidePort);
}
myCache()->probe(pkt, false, cache->cpuSidePort);
if (pkt->result != Packet::Success)
checkFunctional(pkt);
}