inorder: make InOrder CPU FS compilable/visible

make syscall a SE mode only functionality
copy over basic FS functions (hwrei) to make FS compile

src/cpu/inorder/cpu.cc

@@ -151,11 +151,12 @@ InOrderCPU::CPUEvent::process()
         cpu->resPool->trap(fault, tid, inst);
         break;
 
+#if !FULL_SYSTEM
       case Syscall:
         cpu->syscall(inst->syscallNum, tid);
         cpu->resPool->trap(fault, tid, inst);
         break;
-
+#endif
       default:
         fatal("Unrecognized Event Type %s", eventNames[cpuEventType]);    
     }
@@ -198,13 +199,12 @@ InOrderCPU::InOrderCPU(Params *params)
       stCondFails(0),
 #if FULL_SYSTEM
       system(params->system),
-      physmem(system->physmem),
 #endif // FULL_SYSTEM
 #ifdef DEBUG
       cpuEventNum(0),
       resReqCount(0),
 #endif // DEBUG
-      switchCount(0),
+      drainCount(0),
       deferRegistration(false/*params->deferRegistration*/),
       stageTracing(params->stageTracing),
       lastRunningCycle(0),
@@ -289,6 +289,11 @@ InOrderCPU::InOrderCPU(Params *params)
         tc->cpu = this;
         tc->thread = thread[tid];
 
+#if FULL_SYSTEM
+        // Setup quiesce event.
+        this->thread[tid]->quiesceEvent = new EndQuiesceEvent(tc);
+#endif
+
         // Give the thread the TC.
         thread[tid]->tc = tc;
         thread[tid]->setFuncExeInst(0);
@@ -360,12 +365,8 @@ InOrderCPU::InOrderCPU(Params *params)
     
     lastRunningCycle = curTick();
 
-    // Reset CPU to reset state.
-#if FULL_SYSTEM
-    Fault resetFault = new ResetFault();
-    resetFault->invoke(tcBase());
-#endif
-
+    lockAddr = 0;
+    lockFlag = false;
     
     // Schedule First Tick Event, CPU will reschedule itself from here on out.
     scheduleTickEvent(0);
@@ -760,7 +761,13 @@ InOrderCPU::getPort(const std::string &if_name, int idx)
 Fault
 InOrderCPU::hwrei(ThreadID tid)
 {
-    panic("hwrei: Unimplemented");
+#if THE_ISA == ALPHA_ISA
+    // Need to clear the lock flag upon returning from an interrupt.
+    setMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG, false, tid);
+
+    thread[tid]->kernelStats->hwrei();
+    // FIXME: XXX check for interrupts? XXX
+#endif
     
     return NoFault;
 }
@@ -769,8 +776,25 @@ InOrderCPU::hwrei(ThreadID tid)
 bool
 InOrderCPU::simPalCheck(int palFunc, ThreadID tid)
 {
-    panic("simPalCheck: Unimplemented");
+#if THE_ISA == ALPHA_ISA
+    if (this->thread[tid]->kernelStats)
+        this->thread[tid]->kernelStats->callpal(palFunc,
+                                                this->threadContexts[tid]);
 
+    switch (palFunc) {
+      case PAL::halt:
+        halt();
+        if (--System::numSystemsRunning == 0)
+            exitSimLoop("all cpus halted");
+        break;
+
+      case PAL::bpt:
+      case PAL::bugchk:
+        if (this->system->breakpoint())
+            return false;
+        break;
+    }
+#endif
     return true;
 }
 
@@ -1608,7 +1632,7 @@ InOrderCPU::wakeCPU()
 }
 
 #if FULL_SYSTEM
-
+// Lots of copied full system code...place into BaseCPU class?
 void
 InOrderCPU::wakeup()
 {

src/cpu/inorder/cpu.hh

@@ -777,9 +777,6 @@ class InOrderCPU : public BaseCPU
 #if FULL_SYSTEM
     /** Pointer to the system. */
     System *system;
-
-    /** Pointer to physical memory. */
-    PhysicalMemory *physmem;
 #endif
 
     /** The global sequence number counter. */
@@ -793,8 +790,13 @@ class InOrderCPU : public BaseCPU
     unsigned resReqCount;
 #endif
 
-    /** Counter of how many stages have completed switching out. */
-    int switchCount;
+    Addr lockAddr;
+
+    /** Temporary fix for the lock flag, works in the UP case. */
+    bool lockFlag;
+
+    /** Counter of how many stages have completed draining */
+    int drainCount;
 
     /** Pointers to all of the threads in the CPU. */
     std::vector<Thread *> thread;

src/cpu/inorder/inorder_dyn_inst.cc

@@ -36,6 +36,7 @@
 
 #include "arch/faults.hh"
 #include "base/bigint.hh"
+#include "base/cp_annotate.hh"
 #include "base/cprintf.hh"
 #include "base/trace.hh"
 #include "config/the_isa.hh"
@@ -267,7 +268,24 @@ InOrderDynInst::memAccess()
 Fault
 InOrderDynInst::hwrei()
 {
-    panic("InOrderDynInst: hwrei: unimplemented\n");    
+#if THE_ISA == ALPHA_ISA
+    // Can only do a hwrei when in pal mode.
+    if (!(this->instAddr() & 0x3))
+        return new AlphaISA::UnimplementedOpcodeFault;
+
+    // Set the next PC based on the value of the EXC_ADDR IPR.
+    AlphaISA::PCState pc = this->pcState();
+    pc.npc(this->cpu->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR,
+                                          this->threadNumber));
+    this->pcState(pc);
+    if (CPA::available()) {
+        ThreadContext *tc = this->cpu->tcBase(this->threadNumber);
+        CPA::cpa()->swAutoBegin(tc, this->nextInstAddr());
+    }
+
+    // Tell CPU to clear any state it needs to if a hwrei is taken.
+    this->cpu->hwrei(this->threadNumber);
+#endif
     return NoFault;
 }
 

src/cpu/inorder/thread_context.cc

@@ -152,8 +152,8 @@ void
 InOrderThreadContext::regStats(const std::string &name)
 {
 #if FULL_SYSTEM
-    //thread->kernelStats = new Kernel::Statistics(cpu->system);
-    //thread->kernelStats->regStats(name + ".kern");
+    thread->kernelStats = new TheISA::Kernel::Statistics(cpu->system);
+    thread->kernelStats->regStats(name + ".kern");
 #endif
     ;
 }

src/cpu/inorder/thread_context.hh

@@ -37,6 +37,12 @@
 #include "cpu/inorder/thread_state.hh"
 #include "cpu/exetrace.hh"
 #include "cpu/thread_context.hh"
+#include "arch/kernel_stats.hh"
+
+class EndQuiesceEvent;
+namespace Kernel {
+    class Statistics;
+};
 
 class TranslatingPort;