scons: Put all config variables in an env['CONF'] sub-dict.

This makes what are configuration and what are internal SCons variables
explicit and separate, and makes it unnecessary to call out what
variables to export to C++.

These variables will also be plumbed into and out of kconfiglib in later
changes.

Change-Id: Iaf5e098d7404af06285c421dbdf8ef4171b3f001
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56892
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

SConstruct

@@ -630,10 +630,8 @@ for variant_path in variant_paths:
 
     Export('extras_dir_list')
 
-    # Sticky variables that should be exported to #defines in config/*.hh
-    # (see src/SConscript).
-    export_vars = []
-    Export('export_vars')
+    # Variables which were determined with Configure.
+    env['CONF'] = {}
 
     # Walk the tree and execute all SConsopts scripts that wil add to the
     # above variables
@@ -671,19 +669,22 @@ Build variables for {dir}:
     # Save sticky variable settings back to current variables file
     sticky_vars.Save(current_vars_file, env)
 
+    # Pull all the sticky variables into the CONF dict.
+    env['CONF'].update({key: env[key] for key in sticky_vars.keys()})
+
     # Do this after we save setting back, or else we'll tack on an
     # extra 'qdo' every time we run scons.
-    if env['BATCH']:
-        env['CC']     = env['BATCH_CMD'] + ' ' + env['CC']
-        env['CXX']    = env['BATCH_CMD'] + ' ' + env['CXX']
-        env['AS']     = env['BATCH_CMD'] + ' ' + env['AS']
-        env['AR']     = env['BATCH_CMD'] + ' ' + env['AR']
-        env['RANLIB'] = env['BATCH_CMD'] + ' ' + env['RANLIB']
+    if env['CONF']['BATCH']:
+        env['CC']     = env['CONF']['BATCH_CMD'] + ' ' + env['CC']
+        env['CXX']    = env['CONF']['BATCH_CMD'] + ' ' + env['CXX']
+        env['AS']     = env['CONF']['BATCH_CMD'] + ' ' + env['AS']
+        env['AR']     = env['CONF']['BATCH_CMD'] + ' ' + env['AR']
+        env['RANLIB'] = env['CONF']['BATCH_CMD'] + ' ' + env['RANLIB']
 
     # Cache build files in the supplied directory.
-    if env['M5_BUILD_CACHE']:
-        print('Using build cache located at', env['M5_BUILD_CACHE'])
-        CacheDir(env['M5_BUILD_CACHE'])
+    if env['CONF']['M5_BUILD_CACHE']:
+        print('Using build cache located at', env['CONF']['M5_BUILD_CACHE'])
+        CacheDir(env['CONF']['M5_BUILD_CACHE'])
 
 
     env.Append(CCFLAGS='$CCFLAGS_EXTRA')

site_scons/gem5_scons/builders/config_file.py

@@ -67,7 +67,7 @@ def ConfigFile(env):
         variable = str(target[0])
         # True target is config header file
         target = env.Dir('config').File(variable.lower() + '.hh')
-        val = env[variable]
+        val = env['CONF'][variable]
         if isinstance(val, bool):
             # Force value to 0/1
             val = int(val)

src/SConscript

@@ -57,17 +57,13 @@ Export(SourceFilter.factories)
 
 Import('*')
 
-if env['USE_EFENCE']:
+if env['CONF']['USE_EFENCE']:
     env.Append(LIBS=['efence'])
 
 # Children need to see the environment
 Export('env')
 
-all_export_vars = set()
-all_export_vars.update(export_vars)
-all_export_vars.update(sticky_vars.keys())
-
-build_env = [(opt, env[opt]) for opt in all_export_vars]
+build_env = list(env['CONF'].items())
 
 from code_formatter import code_formatter
 
@@ -264,7 +260,7 @@ cxx_file.add_emitter('.proto', protoc_emitter)
 def ProtoBuf(source, tags=None, add_tags=None):
     '''Add a Protocol Buffer to build'''
 
-    if not env['HAVE_PROTOC'] or not env['HAVE_PROTOBUF']:
+    if not env['HAVE_PROTOC'] or not env['CONF']['HAVE_PROTOBUF']:
         error('Got protobuf to build, but lacks support!')
 
     '''Specify the source file, and any tags'''
@@ -558,12 +554,12 @@ for extra_dir in extras_dir_list:
             build_dir = os.path.join(env['BUILDDIR'], root[prefix_len:])
             SConscript(os.path.join(root, 'SConscript'), variant_dir=build_dir)
 
-for opt in all_export_vars:
+for opt in env['CONF'].keys():
     env.ConfigFile(opt)
 
 def makeTheISA(source, target, env):
     isas = sorted(set(env.Split('${ALL_ISAS}')))
-    target_isa = env['TARGET_ISA']
+    target_isa = env['CONF']['TARGET_ISA']
     is_null_isa = '1' if (target_isa.lower() == 'null') else '0'
 
     def namespace(isa):
@@ -586,7 +582,7 @@ env.Command('config/the_isa.hh', [],
             MakeAction(makeTheISA, Transform("CFG ISA", 0)))
 
 def makeTheGPUISA(source, target, env):
-    gpu_isa = env['TARGET_GPU_ISA']
+    gpu_isa = env['CONF']['TARGET_GPU_ISA']
 
     if gpu_isa:
         namespace = gpu_isa[0].upper() + gpu_isa[1:].lower() + 'ISA'

src/arch/SConscript

@@ -56,18 +56,18 @@ Import('*')
 #
 #################################################################
 
-env.TagImplies(env.subst('${TARGET_ISA} isa'), 'gem5 lib')
+env.TagImplies(env.subst('${CONF["TARGET_ISA"]} isa'), 'gem5 lib')
 
 env.SwitchingHeaders(
     Split('''
         isa.hh
         vecregs.hh
         '''),
-    env.subst('${TARGET_ISA}'))
+    env.subst('${CONF["TARGET_ISA"]}'))
 
 amdgpu_isa = ['gcn3', 'vega']
 
-if env['BUILD_GPU']:
+if env['CONF']['BUILD_GPU']:
     env.SwitchingHeaders(
         Split('''
             gpu_decoder.hh
@@ -75,8 +75,9 @@ if env['BUILD_GPU']:
             gpu_registers.hh
             gpu_types.hh
             '''),
-        '{}'.format('amdgpu/' if env['TARGET_GPU_ISA'] in amdgpu_isa else '')+
-        env.subst('${TARGET_GPU_ISA}'))
+        '{}'.format('amdgpu/' if
+            env['CONF']['TARGET_GPU_ISA'] in amdgpu_isa else '') +
+        env.subst('${CONF["TARGET_GPU_ISA"]}'))
 
 #################################################################
 #

src/arch/amdgpu/common/SConscript

@@ -31,10 +31,10 @@ import sys
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
-if env['TARGET_GPU_ISA'] == 'gcn3' or env['TARGET_GPU_ISA'] == 'vega':
+if env['CONF']['TARGET_GPU_ISA'] in ('gcn3', 'vega'):
     SimObject('X86GPUTLB.py', sim_objects=['X86GPUTLB', 'TLBCoalescer'])
 
     Source('tlb.cc')

src/arch/amdgpu/gcn3/SConscript

@@ -33,10 +33,10 @@ import sys
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
-if env['TARGET_GPU_ISA'] == 'gcn3':
+if env['CONF']['TARGET_GPU_ISA'] == 'gcn3':
     Source('decoder.cc')
     Source('insts/gpu_static_inst.cc')
     Source('insts/instructions.cc')

src/arch/amdgpu/vega/SConscript

@@ -33,7 +33,7 @@ import sys
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
 SimObject('VegaGPUTLB.py', sim_objects=['VegaPagetableWalker',
@@ -48,7 +48,7 @@ Source('tlb_coalescer.cc')
 
 DebugFlag('GPUPTWalker', 'Debug flag for GPU page table walker')
 
-if env['TARGET_GPU_ISA'] == 'vega':
+if env['CONF']['TARGET_GPU_ISA'] == 'vega':
     Source('decoder.cc')
     Source('insts/gpu_static_inst.cc')
     Source('insts/instructions.cc')

src/arch/arm/SConscript

@@ -61,7 +61,7 @@ Source('insts/vfp.cc', tags='arm isa')
 Source('insts/fplib.cc', tags='arm isa')
 Source('insts/crypto.cc', tags='arm isa')
 Source('insts/tme64.cc', tags='arm isa')
-if env['PROTOCOL'] == 'MESI_Three_Level_HTM':
+if env['CONF']['PROTOCOL'] == 'MESI_Three_Level_HTM':
     Source('insts/tme64ruby.cc', tags='arm isa')
 else:
     Source('insts/tme64classic.cc', tags='arm isa')
@@ -113,7 +113,6 @@ SimObject('ArmTLB.py', sim_objects=['ArmTLB'], enums=['ArmLookupLevel'],
 SimObject('ArmPMU.py', sim_objects=['ArmPMU'], tags='arm isa')
 
 SimObject('ArmCPU.py', sim_objects=[], tags='arm isa')
-if env['TARGET_ISA'] == 'arm':
 SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='arm isa')
 SimObject('TimingSimpleCPU.py', sim_objects=[], tags='arm isa')
 SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='arm isa')

src/arch/arm/fastmodel/CortexA76/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 protocol_dir = Dir('..').Dir('protocol')

src/arch/arm/fastmodel/CortexR52/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 protocol_dir = Dir('..').Dir('protocol')

src/arch/arm/fastmodel/GIC/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 protocol_dir = Dir('..').Dir('protocol')

src/arch/arm/fastmodel/PL330_DMAC/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 protocol_dir = Dir('..').Dir('protocol')

src/arch/arm/fastmodel/SConscript

@@ -46,13 +46,13 @@ from gem5_scons import Transform, warning, error
 
 import os.path
 
-if env['USE_ARM_FASTMODEL']:
-    if not env['USE_SYSTEMC']:
+if env['CONF']['USE_ARM_FASTMODEL']:
+    if not env['CONF']['USE_SYSTEMC']:
         warning('ARM Fast Models require systemc support')
-        env['USE_ARM_FASTMODEL'] = False
+        env['CONF']['USE_ARM_FASTMODEL'] = False
         Return()
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 
@@ -60,7 +60,7 @@ systemc_home = Dir('#/src/systemc/ext/systemc_home')
 env['ENV']['SYSTEMC_HOME'] = systemc_home.abspath
 
 def extract_var(name):
-    if name not in env:
+    if name not in env['CONF']:
         error('Error: %s is not set' % name)
     print('%s = %s' % (name, env[name]))
     # Make sure the value of this variable shows up as an environment variable
@@ -77,7 +77,7 @@ maxcore_home = Dir(maxcore_home)
 armlmd_license_file = File(armlmd_license_file)
 
 
-pvlib_flavor = env['PVLIB_FLAVOR']
+pvlib_flavor = env['CONF']['PVLIB_FLAVOR']
 pvlib_lib_dir = pvlib_home.Dir('lib').Dir(pvlib_flavor)
 
 simulation_engine_name = 'libMAXCOREInitSimulationEngine.3.so'
@@ -254,7 +254,7 @@ class ProjectFileParser(Grammar):
         t[0] = t[1]
 
 
-license_count = int(env['ARMLMD_LICENSE_COUNT'])
+license_count = int(env['CONF']['ARMLMD_LICENSE_COUNT'])
 arm_licenses = list((Value(object()) for i in range(license_count)))
 license_cycle = cycle(arm_licenses)
 
@@ -348,8 +348,9 @@ class ArmFastModelComponent(object):
         # Simgen also puts required share library under the project folder.
         self.rpaths = [simgen_dir, project_file_dir]
         self.log = gen_dir.File('build_%s.log' % tlc)
-        self.simgen_cmd = env.subst('${SIMGEN} -p %s --configuration %s -b ' +
-            '--verbose off --num-build-cpus 100 --build-dir %s >%s') % \
+        self.simgen_cmd = env.subst('${CONF["SIMGEN"]} -p %s '
+            '--configuration %s -b --verbose off --num-build-cpus 100 '
+            '--build-dir %s >%s') % \
             (shlex.quote(project_file.srcnode().abspath),
              shlex.quote(config_name),
              shlex.quote(simgen_dir.abspath),

src/arch/arm/fastmodel/iris/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 SimObject('Iris.py', sim_objects=[

src/arch/arm/fastmodel/reset_controller/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_ARM_FASTMODEL']:
+if not env['CONF']['USE_ARM_FASTMODEL']:
     Return()
 
 SimObject('FastModelResetControllerExample.py', sim_objects=[

src/arch/arm/kvm/SConscript

@@ -40,7 +40,7 @@ Import('*')
 import platform
 host_isa = platform.machine()
 
-if not (env['USE_KVM'] and env['KVM_ISA'] == 'arm'):
+if not (env['CONF']['USE_KVM'] and env['CONF']['KVM_ISA'] == 'arm'):
     Return()
 
 SimObject('KvmGic.py',

src/arch/mips/SConscript

@@ -52,7 +52,6 @@ SimObject('MipsSeWorkload.py', sim_objects=['MipsSEWorkload', 'MipsEmuLinux'],
 SimObject('MipsTLB.py', sim_objects=['MipsTLB'], tags='mips isa')
 
 SimObject('MipsCPU.py', sim_objects=[], tags='mips isa')
-if env['TARGET_ISA'] == 'mips':
 SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='mips isa')
 SimObject('TimingSimpleCPU.py', sim_objects=[], tags='mips isa')
 SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='mips isa')

src/arch/power/SConscript

@@ -56,7 +56,6 @@ SimObject('PowerSeWorkload.py', sim_objects=[
 SimObject('PowerTLB.py', sim_objects=['PowerTLB'], tags='power isa')
 
 SimObject('PowerCPU.py', sim_objects=[], tags='power isa')
-if env['TARGET_ISA'] == 'power':
 SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='power isa')
 SimObject('TimingSimpleCPU.py', sim_objects=[], tags='power isa')
 SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='power isa')

src/arch/riscv/SConscript

@@ -75,7 +75,6 @@ SimObject('RiscvTLB.py', sim_objects=['RiscvPagetableWalker', 'RiscvTLB'],
     tags='riscv isa')
 
 SimObject('RiscvCPU.py', sim_objects=[], tags='riscv isa')
-if env['TARGET_ISA'] == 'riscv':
 SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='riscv isa')
 SimObject('TimingSimpleCPU.py', sim_objects=[], tags='riscv isa')
 SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='riscv isa')

src/arch/sparc/SConscript

@@ -57,7 +57,6 @@ SimObject('SparcSeWorkload.py', sim_objects=[
 SimObject('SparcTLB.py', sim_objects=['SparcTLB'], tags='sparc isa')
 
 SimObject('SparcCPU.py', sim_objects=[], tags='sparc isa')
-if env['TARGET_ISA'] == 'sparc':
 SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='sparc isa')
 SimObject('TimingSimpleCPU.py', sim_objects=[], tags='sparc isa')
 SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='sparc isa')

src/arch/x86/SConscript

@@ -74,7 +74,6 @@ SimObject('X86TLB.py', sim_objects=['X86PagetableWalker', 'X86TLB'],
     tags='x86 isa')
 
 SimObject('X86CPU.py', sim_objects=[], tags='x86 isa')
-if env['TARGET_ISA'] == 'x86':
 SimObject('AtomicSimpleCPU.py', sim_objects=[], tags='x86 isa')
 SimObject('TimingSimpleCPU.py', sim_objects=[], tags='x86 isa')
 SimObject('NonCachingSimpleCPU.py', sim_objects=[], tags='x86 isa')

src/arch/x86/bare_metal/SConscript

@@ -25,7 +25,4 @@
 
 Import('*')
 
-if env['TARGET_ISA'] != 'x86':
-    Return()
-
-Source('workload.cc')
+Source('workload.cc', tags='x86 isa')

src/arch/x86/kvm/SConscript

@@ -37,7 +37,8 @@
 
 Import('*')
 
-if not env['USE_KVM'] or env['TARGET_ISA'] != env['KVM_ISA']:
+if not env['CONF']['USE_KVM'] or \
+        env['CONF']['TARGET_ISA'] != env['CONF']['KVM_ISA']:
     Return()
 
 SimObject('X86KvmCPU.py', sim_objects=['X86KvmCPU'], tags='x86 isa')

src/base/SConscript

@@ -42,14 +42,10 @@ GTest('cprintf.test', 'cprintf.test.cc')
 Executable('cprintftime', 'cprintftime.cc', 'cprintf.cc')
 Source('debug.cc', add_tags=['gem5 trace', 'gem5 events'])
 GTest('debug.test', 'debug.test.cc', 'debug.cc')
-if env['HAVE_FENV']:
-    Source('fenv.cc')
-else:
-    warning("No IEEE FP rounding mode control.\n"
-            "FP results may deviate slightly from other platforms.")
-if env['HAVE_PNG']:
+Source('fenv.cc', tags='fenv')
+if env['CONF']['HAVE_PNG']:
     SourceLib('png')
-    Source('pngwriter.cc')
+Source('pngwriter.cc', tags='png')
 Source('fiber.cc')
 GTest('fiber.test', 'fiber.test.cc', 'fiber.cc')
 GTest('flags.test', 'flags.test.cc')
@@ -70,7 +66,7 @@ Source('pixel.cc')
 GTest('pixel.test', 'pixel.test.cc', 'pixel.cc')
 Source('pollevent.cc')
 Source('random.cc')
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     Source('remote_gdb.cc')
 Source('socket.cc')
 GTest('socket.test', 'socket.test.cc', 'socket.cc')

src/base/SConsopts

@@ -31,30 +31,35 @@ import gem5_scons
 
 with gem5_scons.Configure(main) as conf:
     # Check for <fenv.h> (C99 FP environment control)
-    conf.env['HAVE_FENV'] = conf.CheckHeader('fenv.h', '<>')
+    conf.env['CONF']['HAVE_FENV'] = conf.CheckHeader('fenv.h', '<>')
 
-    if not conf.env['HAVE_FENV']:
+    if conf.env['CONF']['HAVE_FENV']:
+        conf.env.TagImplies('fenv', 'gem5 lib')
+    else:
         warning("Header file <fenv.h> not found.\n"
                 "This host has no IEEE FP rounding mode control.")
 
     # Check for <png.h> (libpng library needed if wanting to dump
     # frame buffer image in png format)
-    conf.env['HAVE_PNG'] = conf.CheckHeader('png.h', '<>')
+    conf.env['CONF']['HAVE_PNG'] = conf.CheckHeader('png.h', '<>')
 
-    if not conf.env['HAVE_PNG']:
+    if conf.env['CONF']['HAVE_PNG']:
+        conf.env.TagImplies('png', 'gem5 lib')
+    else:
         warning("Header file <png.h> not found.\n"
                 "This host has no libpng library.\n"
                 "Disabling support for PNG framebuffers.")
 
-    have_posix_clock = \
+    conf.env['CONF']['HAVE_POSIX_CLOCK'] = \
         conf.CheckLibWithHeader([None, 'rt'], 'time.h', 'C',
                                 'clock_nanosleep(0,0,NULL,NULL);')
-    if not have_posix_clock:
+    if not conf.env['CONF']['HAVE_POSIX_CLOCK']:
         warning("Can't find library for POSIX clocks.")
 
     # Valgrind gets much less confused if you tell it when you're using
     # alternative stacks.
-    conf.env['HAVE_VALGRIND'] = conf.CheckCHeader('valgrind/valgrind.h')
+    conf.env['CONF']['HAVE_VALGRIND'] = \
+            conf.CheckCHeader('valgrind/valgrind.h')
 
 
 # Check if the compiler supports the [[gnu::deprecated]] attribute
@@ -64,20 +69,16 @@ werror_env.Append(CCFLAGS=['-Werror'])
 with gem5_scons.Configure(werror_env) as conf:
 
     # Store result in the main environment
-    main['HAVE_DEPRECATED_NAMESPACE'] = conf.TryCompile('''
+    main['CONF']['HAVE_DEPRECATED_NAMESPACE'] = conf.TryCompile('''
         int main() {return 0;}
         namespace [[gnu::deprecated("Test namespace deprecation")]]
         test_deprecated_namespace {}
     ''', '.cc')
 
-    if not main['HAVE_DEPRECATED_NAMESPACE']:
+    if not main['CONF']['HAVE_DEPRECATED_NAMESPACE']:
         warning("Deprecated namespaces are not supported by this compiler.\n"
                 "Please make sure to check the mailing list for deprecation "
                 "announcements.")
 
 sticky_vars.Add(BoolVariable('USE_POSIX_CLOCK', 'Use POSIX Clocks',
-                             have_posix_clock))
-
-
-export_vars.extend([
-        'HAVE_FENV', 'HAVE_PNG', 'HAVE_VALGRIND', 'HAVE_DEPRECATED_NAMESPACE'])
+                             '${CONF["HAVE_POSIX_CLOCK"]}'))

src/base/stats/SConscript

@@ -34,11 +34,10 @@ Source('info.cc')
 Source('storage.cc')
 Source('text.cc')
 
-if env['HAVE_HDF5']:
 if env['GCC']:
-        Source('hdf5.cc', append={'CXXFLAGS': '-Wno-deprecated-copy'})
+    Source('hdf5.cc', append={'CXXFLAGS': '-Wno-deprecated-copy'}, tags='hdf5')
 else:
-        Source('hdf5.cc')
+    Source('hdf5.cc', tags='hdf5')
 
 GTest('group.test', 'group.test.cc', 'group.cc', 'info.cc',
     with_tag('gem5 trace'))

src/base/stats/SConsopts

@@ -41,13 +41,13 @@ with gem5_scons.Configure(main) as conf:
     # include path and library path provided by pkg-config. We perform
     # this check even if there isn't a pkg-config configuration for hdf5
     # since some installations don't use pkg-config.
-    conf.env['HAVE_HDF5'] = \
+    conf.env['CONF']['HAVE_HDF5'] = \
             conf.CheckLibWithHeader('hdf5', 'hdf5.h', 'C',
                                     'H5Fcreate("", 0, 0, 0);') and \
             conf.CheckLibWithHeader('hdf5_cpp', 'H5Cpp.h', 'C++',
                                     'H5::H5File("", 0);')
 
-    if not conf.env['HAVE_HDF5']:
+    if conf.env['CONF']['HAVE_HDF5']:
+        conf.env.TagImplies('hdf5', 'gem5 lib')
+    else:
         warning("Couldn't find HDF5 C++ libraries. Disabling HDF5 support.")
-
-export_vars.append('HAVE_HDF5')

src/cpu/SConscript

@@ -85,13 +85,12 @@ Source('pc_event.cc')
 SimObject('FuncUnit.py', sim_objects=['OpDesc', 'FUDesc'], enums=['OpClass'])
 SimObject('StaticInstFlags.py', enums=['StaticInstFlags'])
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 # Only build the protobuf instructions tracer if we have protobuf support.
-if env['HAVE_PROTOBUF']:
-    SimObject('InstPBTrace.py', sim_objects=['InstPBTrace'])
-    Source('inst_pb_trace.cc')
+SimObject('InstPBTrace.py', sim_objects=['InstPBTrace'], tags='protobuf')
+Source('inst_pb_trace.cc', tags='protobuf')
 
 SimObject('CheckerCPU.py', sim_objects=['CheckerCPU'])
 

src/cpu/kvm/SConscript

@@ -37,7 +37,8 @@
 
 Import('*')
 
-if not env['USE_KVM'] or env['TARGET_ISA'] != env['KVM_ISA']:
+if not env['CONF']['USE_KVM'] or \
+        env['CONF']['TARGET_ISA'] != env['CONF']['KVM_ISA']:
     Return()
 
 SimObject('KvmVM.py', sim_objects=['KvmVM'])

src/cpu/kvm/SConsopts

@@ -42,7 +42,7 @@ with gem5_scons.Configure(main) as conf:
     # the types as a fall back.
     # The default value of KVM_ISA should serialize to a string in the
     # C++ header and test False in Scons/Python.
-    conf.env['KVM_ISA'] = ''
+    conf.env['CONF']['KVM_ISA'] = ''
     if not conf.CheckHeader('linux/kvm.h', '<>'):
         print("Info: Compatible header file <linux/kvm.h> not found, "
               "disabling KVM support.")
@@ -52,33 +52,28 @@ with gem5_scons.Configure(main) as conf:
     elif host_isa == 'x86_64':
         if conf.CheckTypeSize('struct kvm_xsave',
                 '#include <linux/kvm.h>') != 0:
-            conf.env['KVM_ISA'] = 'x86'
+            conf.env['CONF']['KVM_ISA'] = 'x86'
         else:
             warning("KVM on x86 requires xsave support in kernel headers.")
     elif host_isa in ('armv7l', 'aarch64'):
-        conf.env['KVM_ISA'] = 'arm'
+        conf.env['CONF']['KVM_ISA'] = 'arm'
     else:
         warning("Failed to determine host ISA.")
 
-    if conf.env['KVM_ISA']:
+    if conf.env['CONF']['KVM_ISA']:
         # Check if the exclude_host attribute is available. We want this to
         # get accurate instruction counts in KVM.
-        conf.env['HAVE_PERF_ATTR_EXCLUDE_HOST'] = conf.CheckMember(
+        conf.env['CONF']['HAVE_PERF_ATTR_EXCLUDE_HOST'] = conf.CheckMember(
             'linux/perf_event.h', 'struct perf_event_attr', 'exclude_host')
 
         # Warn about missing optional functionality
-        if not conf.env['HAVE_PERF_ATTR_EXCLUDE_HOST']:
+        if not conf.env['CONF']['HAVE_PERF_ATTR_EXCLUDE_HOST']:
             warning("perf_event headers lack support for the exclude_host "
                     "attribute. KVM instruction counts will be inaccurate.")
 
-        export_vars.append('HAVE_PERF_ATTR_EXCLUDE_HOST')
-
-if main['KVM_ISA']:
+if main['CONF']['KVM_ISA']:
     sticky_vars.Add(BoolVariable('USE_KVM',
                 'Enable hardware virtualized (KVM) CPU models', True))
 else:
-    main['USE_KVM'] = False
-    export_vars.append('USE_KVM')
+    main['CONF']['USE_KVM'] = False
     warning("Can not enable KVM, host seems to lack KVM support")
-
-export_vars.append('KVM_ISA')

src/cpu/minor/SConscript

@@ -40,7 +40,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     SimObject('BaseMinorCPU.py', sim_objects=[
         'MinorOpClass', 'MinorOpClassSet', 'MinorFUTiming', 'MinorFU',
         'MinorFUPool', 'BaseMinorCPU'],

src/cpu/o3/SConscript

@@ -30,7 +30,7 @@ import sys
 
 Import('*')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     SimObject('FUPool.py', sim_objects=['FUPool'])
     SimObject('FuncUnitConfig.py', sim_objects=[])
     SimObject('BaseO3CPU.py', sim_objects=['BaseO3CPU'], enums=[

src/cpu/o3/probe/SConscript

@@ -37,12 +37,11 @@
 
 Import('*')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     SimObject('SimpleTrace.py', sim_objects=['SimpleTrace'])
     Source('simple_trace.cc')
     DebugFlag('SimpleTrace')
 
-    if env['HAVE_PROTOBUF']:
-        SimObject('ElasticTrace.py', sim_objects=['ElasticTrace'])
-        Source('elastic_trace.cc')
-        DebugFlag('ElasticTrace')
+    SimObject('ElasticTrace.py', sim_objects=['ElasticTrace'], tags='protobuf')
+    Source('elastic_trace.cc', tags='protobuf')
+    DebugFlag('ElasticTrace', tags='protobuf')

src/cpu/pred/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 SimObject('BranchPredictor.py', sim_objects=[

src/cpu/simple/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     SimObject('BaseAtomicSimpleCPU.py', sim_objects=['BaseAtomicSimpleCPU'])
     Source('atomic.cc')
 

src/cpu/simple/probes/SConscript

@@ -28,6 +28,6 @@
 
 Import('*')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     SimObject('SimPoint.py', sim_objects=['SimPoint'])
     Source('simpoint.cc')

src/cpu/testers/directedtest/SConscript

@@ -35,7 +35,7 @@ Import('*')
 # When this dependency is removed, the ruby tester should be compiled
 # independently from Ruby
 #
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('RubyDirectedTester.py', sim_objects=[

src/cpu/testers/garnet_synthetic_traffic/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('GarnetSyntheticTraffic.py', sim_objects=['GarnetSyntheticTraffic'])

src/cpu/testers/gpu_ruby_test/SConscript

@@ -31,10 +31,10 @@
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('ProtocolTester.py', sim_objects=['ProtocolTester'])

src/cpu/testers/rubytest/SConscript

@@ -35,7 +35,7 @@ Import('*')
 # When this dependency is removed, the ruby tester should be compiled
 # independently from Ruby
 #
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('RubyTester.py', sim_objects=['RubyTester'])

src/cpu/testers/traffic_gen/SConscript

@@ -65,8 +65,7 @@ if env['USE_PYTHON']:
 
 # Only build the traffic generator if we have support for protobuf as the
 # tracing relies on it
-if env['HAVE_PROTOBUF']:
-    SimObject('TrafficGen.py', sim_objects=['TrafficGen'])
-    Source('trace_gen.cc')
-    Source('traffic_gen.cc')
+SimObject('TrafficGen.py', sim_objects=['TrafficGen'], tags='protobuf')
+Source('trace_gen.cc', tags='protobuf')
+Source('traffic_gen.cc', tags='protobuf')
 

src/cpu/trace/SConscript

@@ -1,12 +1,11 @@
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 # Only build TraceCPU if we have support for protobuf as TraceCPU relies on it
-if env['HAVE_PROTOBUF']:
-    SimObject('TraceCPU.py', sim_objects=['TraceCPU'])
-    Source('trace_cpu.cc')
+SimObject('TraceCPU.py', sim_objects=['TraceCPU'], tags='protobuf')
+Source('trace_cpu.cc', tags='protobuf')
 
 DebugFlag('TraceCPUData')
 DebugFlag('TraceCPUInst')

src/dev/SConscript

@@ -44,7 +44,7 @@ DebugFlag('DMA')
 SimObject('Platform.py', sim_objects=['Platform'])
 Source('platform.cc')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 SimObject('BadDevice.py', sim_objects=['BadDevice'])

src/dev/amdgpu/SConscript

@@ -29,7 +29,7 @@
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
 # Controllers

src/dev/arm/SConscript

@@ -63,7 +63,7 @@ SimObject('EnergyCtrl.py', sim_objects=['EnergyCtrl'], tags='arm isa')
 SimObject('NoMali.py', sim_objects=['NoMaliGpu', 'CustomNoMaliGpu'],
     enums=['NoMaliGpuType'], tags='arm isa')
 SimObject('VirtIOMMIO.py', sim_objects=['MmioVirtIO'], tags='arm isa')
-if env['USE_ARM_FASTMODEL']:
+if env['CONF']['USE_ARM_FASTMODEL']:
     SimObject('VExpressFastmodel.py', sim_objects=[], tags='arm isa')
 
 Source('a9scu.cc', tags='arm isa')

src/dev/hsa/SConscript

@@ -31,7 +31,7 @@
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
 SimObject('HSADevice.py', sim_objects=['HSAPacketProcessor'])

src/dev/i2c/SConscript

@@ -37,7 +37,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 SimObject('I2C.py', sim_objects=['I2CDevice', 'I2CBus'])

src/dev/net/SConscript

@@ -44,7 +44,7 @@ SimObject('Ethernet.py', sim_objects=[
     'EtherLink', 'DistEtherLink', 'EtherBus', 'EtherSwitch', 'EtherTapBase',
     'EtherTapStub', 'EtherDump', 'EtherDevice', 'IGbE', 'EtherDevBase',
     'NSGigE', 'Sinic'] +
-    (['EtherTap'] if env['HAVE_TUNTAP'] else []))
+    (['EtherTap'] if env['CONF']['HAVE_TUNTAP'] else []))
 
 # Basic Ethernet infrastructure
 Source('etherbus.cc')

src/dev/net/SConsopts

@@ -29,9 +29,7 @@ import gem5_scons
 
 with gem5_scons.Configure(main) as conf:
     # Check if the TUN/TAP driver is available.
-    conf.env['HAVE_TUNTAP'] = conf.CheckHeader('linux/if_tun.h', '<>')
+    conf.env['CONF']['HAVE_TUNTAP'] = conf.CheckHeader('linux/if_tun.h', '<>')
 
-if not main['HAVE_TUNTAP']:
+if not main['CONF']['HAVE_TUNTAP']:
     print("Info: Compatible header file <linux/if_tun.h> not found.")
-
-export_vars.append('HAVE_TUNTAP')

src/dev/ps2/SConscript

@@ -37,7 +37,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 SimObject('PS2.py', sim_objects=[

src/dev/serial/SConscript

@@ -40,7 +40,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 SimObject('Serial.py', sim_objects=['SerialDevice', 'SerialNullDevice'])

src/dev/storage/SConscript

@@ -40,7 +40,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 # Controllers

src/dev/virtio/SConscript

@@ -37,7 +37,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 SimObject('VirtIO.py', sim_objects=[

src/gpu-compute/SConscript

@@ -31,7 +31,7 @@
 
 Import('*')
 
-if not env['BUILD_GPU']:
+if not env['CONF']['BUILD_GPU']:
     Return()
 
 SimObject('GPU.py', sim_objects=[

src/kern/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['TARGET_ISA'] == 'null':
+if env['CONF']['TARGET_ISA'] == 'null':
     Return()
 
 Source('linux/events.cc')

src/mem/SConscript

@@ -97,7 +97,7 @@ Source('port_terminator.cc')
 
 GTest('translation_gen.test', 'translation_gen.test.cc')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     Source('translating_port_proxy.cc')
     Source('se_translating_port_proxy.cc')
     Source('page_table.cc')

src/mem/probes/SConscript

@@ -47,6 +47,5 @@ SimObject('MemFootprintProbe.py', sim_objects=['MemFootprintProbe'])
 Source('mem_footprint.cc')
 
 # Packet tracing requires protobuf support
-if env['HAVE_PROTOBUF']:
-    SimObject('MemTraceProbe.py', sim_objects=['MemTraceProbe'])
-    Source('mem_trace.cc')
+SimObject('MemTraceProbe.py', sim_objects=['MemTraceProbe'], tags='protobuf')
+Source('mem_trace.cc', tags='protobuf')

src/mem/ruby/SConscript

@@ -37,7 +37,7 @@ from gem5_scons import Transform
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 DebugFlag('ProtocolTrace')

src/mem/ruby/common/SConscript

@@ -28,10 +28,11 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
-env.Append(CPPDEFINES={'NUMBER_BITS_PER_SET': env['NUMBER_BITS_PER_SET']})
+env.Append(CPPDEFINES={'NUMBER_BITS_PER_SET':
+    env['CONF']['NUMBER_BITS_PER_SET']})
 
 Source('Address.cc')
 Source('BoolVec.cc')

src/mem/ruby/network/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('BasicLink.py', sim_objects=[

src/mem/ruby/network/fault_model/SConscript

@@ -33,7 +33,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('FaultModel.py', sim_objects=['FaultModel'])

src/mem/ruby/network/garnet/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('GarnetLink.py', enums=['CDCType'], sim_objects=[

src/mem/ruby/network/simple/SConscript

@@ -40,7 +40,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('SimpleLink.py', sim_objects=['SimpleExtLink', 'SimpleIntLink'])

src/mem/ruby/profiler/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 Source('AccessTraceForAddress.cc')

src/mem/ruby/protocol/SConscript

@@ -36,7 +36,7 @@ from gem5_scons import Transform
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 output_dir = Dir('.')
@@ -69,7 +69,7 @@ def slicc_emitter(target, source, env):
     slicc = SLICC(filepath, protocol_base.abspath, verbose=False)
     slicc.process()
     slicc.writeCodeFiles(output_dir.abspath, slicc_includes)
-    if env['SLICC_HTML']:
+    if env['CONF']['SLICC_HTML']:
         slicc.writeHTMLFiles(html_dir.abspath)
 
     target.extend([output_dir.File(f) for f in sorted(slicc.files())])
@@ -82,13 +82,13 @@ def slicc_action(target, source, env):
     slicc = SLICC(filepath, protocol_base.abspath, verbose=True)
     slicc.process()
     slicc.writeCodeFiles(output_dir.abspath, slicc_includes)
-    if env['SLICC_HTML']:
+    if env['CONF']['SLICC_HTML']:
         slicc.writeHTMLFiles(html_dir.abspath)
 
 slicc_builder = Builder(action=MakeAction(slicc_action, Transform("SLICC")),
                         emitter=slicc_emitter)
 
-protocol = env['PROTOCOL']
+protocol = env['CONF']['PROTOCOL']
 protocol_dir = None
 for path in env['PROTOCOL_DIRS']:
     if os.path.exists(path.File("%s.slicc" % protocol).abspath):

src/mem/ruby/slicc_interface/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('Controller.py', sim_objects=['RubyController'])

src/mem/ruby/structures/SConscript

@@ -28,7 +28,7 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
 SimObject('RubyCache.py', sim_objects=['RubyCache'])

src/mem/ruby/system/SConscript

@@ -40,31 +40,31 @@
 
 Import('*')
 
-if env['PROTOCOL'] == 'None':
+if env['CONF']['PROTOCOL'] == 'None':
     Return()
 
-env.Append(CPPDEFINES=['PROTOCOL_' + env['PROTOCOL']])
+env.Append(CPPDEFINES=['PROTOCOL_' + env['CONF']['PROTOCOL']])
 
-if env['PROTOCOL'] in env['NEED_PARTIAL_FUNC_READS']:
+if env['CONF']['PROTOCOL'] in env['NEED_PARTIAL_FUNC_READS']:
     env.Append(CPPDEFINES=['PARTIAL_FUNC_READS'])
 
-if env['BUILD_GPU']:
+if env['CONF']['BUILD_GPU']:
     SimObject('GPUCoalescer.py', sim_objects=['RubyGPUCoalescer'])
 SimObject('RubySystem.py', sim_objects=['RubySystem'])
 SimObject('Sequencer.py', sim_objects=[
     'RubyPort', 'RubyPortProxy', 'RubySequencer', 'RubyHTMSequencer',
     'DMASequencer'])
-if env['BUILD_GPU']:
+if env['CONF']['BUILD_GPU']:
     SimObject('VIPERCoalescer.py', sim_objects=['VIPERCoalescer'])
 
 Source('CacheRecorder.cc')
 Source('DMASequencer.cc')
-if env['BUILD_GPU']:
+if env['CONF']['BUILD_GPU']:
     Source('GPUCoalescer.cc')
 Source('HTMSequencer.cc')
 Source('RubyPort.cc')
 Source('RubyPortProxy.cc')
 Source('RubySystem.cc')
 Source('Sequencer.cc')
-if env['BUILD_GPU']:
+if env['CONF']['BUILD_GPU']:
     Source('VIPERCoalescer.cc')

src/proto/SConscript

@@ -38,14 +38,8 @@
 Import('*')
 
 # Only build if we have protobuf support
-if env['HAVE_PROTOBUF']:
-    ProtoBuf('inst_dep_record.proto')
-    ProtoBuf('packet.proto')
-    ProtoBuf('inst.proto')
-    Source('protobuf.cc')
-    Source('protoio.cc')
-
-    # protoc relies on the fact that undefined preprocessor symbols are
-    # explanded to 0 but since we use -Wundef they end up generating
-    # warnings.
-    env.Append(CCFLAGS='-DPROTOBUF_INLINE_NOT_IN_HEADERS=0')
+ProtoBuf('inst_dep_record.proto', tags='protobuf')
+ProtoBuf('packet.proto', tags='protobuf')
+ProtoBuf('inst.proto', tags='protobuf')
+Source('protobuf.cc', tags='protobuf')
+Source('protoio.cc', tags='protobuf')

src/proto/SConsopts

@@ -65,13 +65,18 @@ with gem5_scons.Configure(main) as conf:
     # automatically added to the LIBS environment variable. After
     # this, we can use the HAVE_PROTOBUF flag to determine if we have
     # got both protoc and libprotobuf available.
-    conf.env['HAVE_PROTOBUF'] = conf.env['HAVE_PROTOC'] and \
+    conf.env['CONF']['HAVE_PROTOBUF'] = conf.env['HAVE_PROTOC'] and \
         conf.CheckLibWithHeader('protobuf', 'google/protobuf/message.h',
                                 'C++', 'GOOGLE_PROTOBUF_VERIFY_VERSION;')
 
 # If we have the compiler but not the library, print another warning.
-if main['HAVE_PROTOC'] and not main['HAVE_PROTOBUF']:
+if main['HAVE_PROTOC'] and not main['CONF']['HAVE_PROTOBUF']:
     warning('Did not find protocol buffer library and/or headers.\n'
             'Please install libprotobuf-dev for tracing support.')
 
-export_vars.append('HAVE_PROTOBUF')
+if main['CONF']['HAVE_PROTOBUF']:
+    main.TagImplies('protobuf', 'gem5 lib')
+    # protoc relies on the fact that undefined preprocessor symbols are
+    # explanded to 0 but since we use -Wundef they end up generating
+    # warnings.
+    main.Append(CCFLAGS='-DPROTOBUF_INLINE_NOT_IN_HEADERS=0')

src/sim/SConscript

@@ -104,7 +104,7 @@ GTest('proxy_ptr.test', 'proxy_ptr.test.cc')
 GTest('serialize.test', 'serialize.test.cc', with_tag('gem5 serialize'))
 GTest('serialize_handlers.test', 'serialize_handlers.test.cc')
 
-if env['TARGET_ISA'] != 'null':
+if env['CONF']['TARGET_ISA'] != 'null':
     SimObject('InstTracer.py', sim_objects=['InstTracer'])
     SimObject('Process.py', sim_objects=['Process', 'EmulatedDriver'])
     Source('faults.cc')

src/systemc/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_SYSTEMC']:
+if not env['CONF']['USE_SYSTEMC']:
     Return()
 
 env.UseSystemcCheck(warn=True)

src/systemc/SConsopts

@@ -44,5 +44,7 @@ def use_systemc_check(env, warn=False):
 
 main.AddMethod(use_systemc_check, 'UseSystemcCheck')
 
+main['CONF']['USE_SYSTEMC'] = main.UseSystemcCheck()
+
 sticky_vars.Add(BoolVariable('USE_SYSTEMC', 'Enable SystemC API support',
                              main.UseSystemcCheck()))

src/systemc/channel/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('messages.cc')
     Source('sc_clock.cc')
     Source('sc_event_queue.cc')

src/systemc/core/SConscript

@@ -27,7 +27,7 @@ import gem5_scons
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     SimObject('SystemC.py', sim_objects=[
         'SystemC_Kernel', 'SystemC_ScObject', 'SystemC_ScModule'])
 

src/systemc/dt/SConscript

@@ -25,5 +25,5 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('sc_mempool.cc')

src/systemc/dt/bit/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('messages.cc')
     Source('sc_bit.cc')
     Source('sc_bv_base.cc')

src/systemc/dt/fx/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('messages.cc')
     Source('sc_fxcast_switch.cc')
     Source('sc_fxdefs.cc')

src/systemc/dt/int/SConscript

@@ -27,7 +27,7 @@ Import('*')
 
 from gem5_scons.util import compareVersions
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     if env['GCC'] and compareVersions(env['CXXVERSION'], '10.0') >= 0:
         disable_false_positives = {
             "CCFLAGS": [ "-Wno-array-bounds",

src/systemc/dt/misc/SConscript

@@ -25,6 +25,6 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('sc_concatref.cc')
     Source('sc_value_base.cc')

src/systemc/python/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_SYSTEMC'] or not env['USE_PYTHON']:
+if not env['CONF']['USE_SYSTEMC'] or not env['USE_PYTHON']:
     Return()
 
 PySource('m5', 'systemc.py')

src/systemc/tests/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if env['USE_SYSTEMC'] and GetOption('with_systemc_tests'):
+if env['CONF']['USE_SYSTEMC'] and GetOption('with_systemc_tests'):
 
     from gem5_scons import Transform
 

src/systemc/tlm_bridge/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if not env['USE_SYSTEMC']:
+if not env['CONF']['USE_SYSTEMC']:
     Return()
 
 SimObject('TlmBridge.py', sim_objects=[

src/systemc/tlm_core/2/generic_payload/SConscript

@@ -25,6 +25,6 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('gp.cc')
     Source('phase.cc')

src/systemc/tlm_core/2/quantum/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('global_quantum.cc')
     if env['USE_PYTHON']:
         Source('global_quantum_python.cc')

src/systemc/tlm_utils/SConscript

@@ -25,6 +25,6 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('convenience_socket_bases.cc')
     Source('instance_specific_extensions.cc')

src/systemc/utils/SConscript

@@ -25,7 +25,7 @@
 
 Import('*')
 
-if env['USE_SYSTEMC']:
+if env['CONF']['USE_SYSTEMC']:
     Source('functions.cc')
     Source('messages.cc')
     Source('report.cc')